s908ey8ad4cfjer Freescale Semiconductor, Inc, s908ey8ad4cfjer Datasheet - Page 58

• Manufacturer Part Number: s908ey8ad4cfjer
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Configuration Registers (CONFIG1 and CONFIG2)
ESCIBDSRC — ESCI Baud Rate Clock Source Bit
EXTXTALEN — External Crystal Enable Bit
58
ESCIBDSRC controls the clock source used for the ESCI. The setting of the bit affects the frequency
at which the ESCI operates.
EXTXTALEN enables the external oscillator circuits to be configured for a crystal configuration where
the PTC4/OSC1 and PTC3/OSC2 pins are the connections for an external crystal.
Clearing the EXTXTALEN bit (default setting) allows the PTC3/OSC2 pin to function as a
general-purpose I/O pin. Refer to
Chapter 8 Internal Clock Generator (ICG) Module
operation.
EXTXTALEN, when set, also configures the clock monitor to expect an external clock source in the
valid range of crystals (30 kHz to 100 kHz or 1 MHz to 8 MHz). When EXTXTALEN is clear, the clock
monitor will expect an external clock source in the valid range for externally generated clocks when
using the clock monitor (60 Hz to 32 MHz).
EXTXTALEN, when set, also configures the external clock stabilization divider in the clock monitor for
a 4096-cycle timeout to allow the proper stabilization time for a crystal. When EXTXTALEN is clear,
the stabilization divider is configured to 16 cycles since an external clock source does not need a
startup time.
1 = Internal data bus clock used as clock source for ESCI
0 = CGMXCLK used as clock source for ESCI
1 = Allows PTC3/OSC2 to be an external crystal connection.
0 = PTC3/OSC2 functions as an I/O port pin (default).
EXTCLKEN EXTXTALEN PTC4/OSC1 PTC3/OSC2
Configuration Bits
0
0
1
1
External Clock
Address:
Reset:
This bit does not function without setting the EXTCLKEN bit also.
Read:
Write:
COPRS
1. The LVI5OR3 bit is cleared only by a power-on reset (POR).
$001F
0
1
0
1
Bit 7
0
Figure 5-2. Configuration Register 1 (CONFIG1)
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Table 5-1. External Clock Option Settings
LVISTOP
OSC1
OSC1
PTC4
PTC4
6
0
Pin Function
Table 5-1
LVIRSTD
5
0
OSC2
PTC3
PTC3
PTC3
for configuration options for the external source. See
NOTE
LVIPWRD
for a more detailed description of the external clock
4
0
Default setting — external oscillator disabled
External oscillator disabled since EXTCLKEN not set
External oscillator configured for an external clock
source input (square wave) on OSC1
External oscillator configured for an external crystal
configuration on OSC1 and OSC2. System will also
operate with square-wave clock source in OSC1.
LVI5OR3
3
0
(1)
SSREC
Description
2
0
STOP
1
0
Freescale Semiconductor
COPD
Bit 0
0