adc12qs065civs National Semiconductor Corporation, adc12qs065civs Datasheet

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adc12qs065civs

Manufacturer Part Number
adc12qs065civs
Description
Quad 12-bit 65 Msps A/d Converter With Lvds Serialized Outputs
Manufacturer
National Semiconductor Corporation
Datasheet
© 2005 National Semiconductor Corporation
ADC12QS065
Quad 12-Bit 65 MSPS A/D Converter with LVDS
Serialized Outputs
General Description
This is Preliminary Information for a product currently in
development. ALL specifications are design targets and
are subject to change.
The ADC12QS065 is a low power, high performance CMOS
4-channel analog-to-digital converter with LVDS serialized
outputs. The ADC12QS065 digitizes signals to 12 bits reso-
lution at sampling rates up to 65 MSPS while consuming a
typical 200 mW/ADC from a single 3.0V supply. Sampled
data is transformed into high speed serial LVDS output data
streams. Clock and frame LVDS pairs aid in data capture.
The ADC12QS065’s six differential pairs transmit data over
backplanes or cable and also make PCB design easier. In
addition, the reduced cable, PCB trace count, and connector
size tremendously reduce cost.
No missing codes performance is guaranteed over the full
operating temperature range. The pipeline ADC architecture
achieves
65 MSPS.
The ADC12QS065 output pins can be put into a high imped-
ance state. The serializer PLL can lock to frequencies be-
tween 20 MHz and 65 MHz.
When not converting, power consumption can be reduced by
pulling the PD (Power Down) pin high, placing the converter
into a low power state where it typically consumes less than
3 mW total, and from which recovery is less than 5 ms. The
ADC12QS065’s speed, resolution and single supply opera-
tion makes it well suited for a variety of applications in
ultrasound, imaging, video and communications. Operating
over the industrial (-40˚C to +85˚C) temperature range, the
ADC12QS065 is available in a 64 pin TQFP package.
Connection Diagram
>
11 Effective Bits over the entire Nyquist band at
DS201068
Features
n Single +3.0V supply operation
n Internal sample-and-hold
n Internal reference
n Low power consumption
n Power down mode
n Clock and Data Frame Timing
n 780 Mbps serial LVDS data rate (at 65 MHz clock)
n LVDS serial output rated for 100 Ohm load
Key Specifications
n Resolution
n DNL
n SNR (f
n SFDR (f
n ENOB (at Nyquist)
n Power Consumption
n -- Operating, 65 MSPS, per ADC
n -- Power Down Mode
Applications
n Ultrasound
n Medical Imaging
n Communications
n Portable Instrumentation
n Digital Video
IN
IN
= 10 MHz)
= 10 MHz)
20106801
PRELIMINARY
November 2005
±
200 mW (typ)
<
www.national.com
0.3 LSB (typ)
68.5 dB (typ)
11 Bits (typ)
85 dB (typ)
3 mW (typ)
12 Bits

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adc12qs065civs Summary of contents

Page 1

... Operating over the industrial (-40˚C to +85˚C) temperature range, the ADC12QS065 is available pin TQFP package. Connection Diagram © 2005 National Semiconductor Corporation Features n Single +3.0V supply operation n Internal sample-and-hold n Internal reference ...

Page 2

... Ordering Information Industrial (−40˚C ≤ T ADC12QS065CIVS ADC12QS065EVAL Block Diagram www.national.com ≤ +85˚C) Package A 64 Pin TQFP Evaluation Board 2 20106802 ...

Page 3

Pin Descriptions Pin No. Symbol ANALOG I ...

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Pin Descriptions (Continued) Pin No. Symbol 47 DO1- 45 DO2- 37 DO3- 35 DO4- 41 FRAME+ 42 FRAME- 39 OUTCLK+ 40 OUTCLK- ANALOG POWER 1,16,18,20 61,63 2,5,8,9, 12,15,17,19, AGND 29,52,62,64 DIGITAL POWER 27, 28,53 DGND 30, ...

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Absolute Maximum Ratings 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications – Voltage on any pin to ...

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Converter Electrical Characteristics NOTE: This product is currently under development. As such, the parameters specified in this section are DESIGN TARGETS. The specifications in this section cannot be guaranteed until device characterization has taken place. Un- less otherwise specified, the ...

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DC and Logic Electrical Characteristics NOTE: This product is currently under development. As such, the parameters specified in this section are DESIGN TARGETS. The specifications in this section cannot be guaranteed until device characterization has taken place. Un- less otherwise ...

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LVDS Electrical Characteristics NOTE: This product is currently under development. As such, the parameters specified in this section are DESIGN TARGETS. The specifications in this section cannot be guaranteed until device characterization has taken place. Un- less otherwise specified, the ...

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LVDS Electrical Characteristics Note 7: The inputs are protected as shown below. Input voltage magnitudes above V (Note 3). However, errors in the A/D conversion can occur if the input goes above V input voltage must be ≤+3.4V to ensure ...

Page 10

Specification Definitions APERTURE DELAY is the time after the rising edge of the clock to when the input signal is acquired or held for conver- sion. APERTURE JITTER (APERTURE UNCERTAINTY) is the variation in aperture delay from sample to sample. ...

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Timing Diagram Transfer Characteristic LVDS Output Timing FIGURE 1. Transfer Characteristic 11 20106809 20106810 www.national.com ...

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Functional Description Operating on a single +3.0V supply, the ADC12QS065 uses a pipeline architecture and has error correction circuitry to help ensure maximum performance. The differential analog input signal is digitized to 12 bits. The user has the choice of ...

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Applications Information Where dev is the angular difference in degrees between the two signals having a 180˚ relative phase relationship to each other (see Figure 3). Drive the analog inputs with a source impedance less than 100Ω. 20106812 FIGURE 3. ...

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Applications Information 2.3 Internal Regulator The ADC12QS065 has an internal 1.8V regulator. The VREG pins (pins 32 and 48) should each be bypassed to AGND with a 1.0 µF capacitor. 3.0 DIGITAL INPUTS Digital TTL/CMOS compatible inputs consist of CLK, ...

Page 15

Applications Information FIGURE 4. Application Circuit using Transformer Drive Circuit (Continued) 15 20106813 www.national.com ...

Page 16

Applications Information FIGURE 5. Differential Op-Amp Drive Circuit of Figure 4 5.0 POWER SUPPLY CONSIDERATIONS The power supply pins should be bypassed with a 10 µF capacitor and with a 0.1 µF ceramic chip capacitor within a centimeter of each ...

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Applications Information ence input pin and ground should be connected to a very clean point in the ground plane. Traces for the input chan- nels should be routed away from each other as much as possible, with Ground plane between ...

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... Deutsch Tel: +49 (0) 69 9508 6208 English www.national.com Français Tel: +33 ( 8790 64-Lead TQFP Package Ordering Number ADC12QS065CIVS NS Package Number VECO64A 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system affect its safety or effectiveness ...

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