adc12qs065civs National Semiconductor Corporation, adc12qs065civs Datasheet - Page 9

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adc12qs065civs

Manufacturer Part Number
adc12qs065civs
Description
Quad 12-bit 65 Msps A/d Converter With Lvds Serialized Outputs
Manufacturer
National Semiconductor Corporation
Datasheet
LVDS Electrical Characteristics
Note 7: The inputs are protected as shown below. Input voltage magnitudes above V
(Note 3). However, errors in the A/D conversion can occur if the input goes above V
input voltage must be ≤+3.4V to ensure accurate conversions.
Note 8: To guarantee accuracy, it is required that |V
Note 9: With the test condition for V
Note 10: Typical figures are at T
Level).
Note 11: Integral Non Linearity is defined as the deviation of the analog value, expressed in LSBs, from the straight line that passes through positive and negative
full-scale.
Note 12: Timing specifications are tested at TTL logic levels, V
Note 13: Optimum performance will be obtained by keeping the reference input in the 0.8V to 1.2V range. The LM4051CIM3-ADJ (SOT-23 package) is
recommended for external reference applications.
Note 14: I
V
voltage, C
Note 15: Excludes I
DR
, and the rate at which the outputs are switching (which is signal dependent). I
n
DR
is total capacitance on the output pin, and f
is the current consumed by the switching of the output drivers and is primarily determined by load capacitance on the output pins, the supply voltage,
DR
. See note 14.
J
= 25˚C, and represent most likely parametric norms. Test limits are guaranteed to National’s AOQL (Average Outgoing Quality
REF
= +1.0V (2V
A
P-P
–V
n
D
differential input), the 12-bit LSB is 488 µV.
is the average frequency at which that pin is toggling.
| ≤ 100 mV and separate bypass capacitors are used at each power supply pin.
IL
= 0.4V for a falling edge and V
(Continued)
DR
9
A
=V
or below GND by more than 100 mV. As an example, if V
DR
A
20106807
or below GND will not damage this device, provided current is limited per
(C
0
x f
0
+ C
IH
= 2.0V for a rising edge.
1
x f
1
+....C
11
x f
11
) where V
DR
is the output driver power supply
A
is +3.3V, the full-scale
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