adv7344 Analog Devices, Inc., adv7344 Datasheet - Page 60

• Manufacturer Part Number: adv7344
• Description: Multiformat Video Encoder Six 14-bit Noise Shaped Video Dacs
• Manufacturer: Analog Devices, Inc.

ADV7344
When changing the adaptive filter mode to Mode B
(Subaddress 0x35, Bit 6), the output shown in Figure 76
can be obtained.
SD DIGITAL NOISE REDUCTION
Subaddress 0xA3 to Subaddress 0xA5
Digital noise reduction (DNR) is applied to the Y data only.
A filter block selects the high frequency, low amplitude compo-
nents of the incoming signal (DNR input select). The absolute
value of the filter output is compared to a programmable
threshold value (DNR threshold control). There are two DNR
modes available, DNR mode and DNR sharpness mode.
Figure 75. Output Signal from ED/HD Adaptive Filter (Mode A)
Figure 76. Output Signal from ED/HD Adaptive Filter (Mode B)
Figure 74. Input Signal to ED/HD Adaptive Filter
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In DNR mode, if the absolute value of the filter output is smaller
than the threshold, it is assumed to be noise. A programmable
amount (coring gain border, coring gain data) of this noise
signal is subtracted from the original signal. In DNR sharpness
mode, if the absolute value of the filter output is less than the
programmed threshold, it is assumed to be noise. Otherwise, if
the level exceeds the threshold, now identified as a valid signal,
a fraction of the signal (coring gain border, coring gain data) is
added to the original signal to boost high frequency components
and sharpen the video image.
In MPEG systems, it is common to process the video information
in blocks of 8 pixels × 8 pixels for MPEG2 systems, or 16 pixels
× 16 pixels for MPEG1 systems (block size control). DNR can
be applied to the resulting block transition areas that are known
to contain noise. Generally, the block transition area contains
two pixels. It is possible to define this area to contain four pixels
(border area).
It is also possible to compensate for variable block positioning
or differences in YCrCb pixel timing with the use of the DNR
block offset.
The digital noise reduction registers are three 8-bit registers.
They are used to control the DNR processing.
Y DATA
Y DATA
INPUT
INPUT
DNR MODE
NOISE
SIGNAL PATH
DNR
SHARPNESS
MODE
NOISE
SIGNAL PATH
INPUT FILTER
INPUT FILTER
MAIN SIGNAL PATH
MAIN SIGNAL PATH
BLOCK
BLOCK
Figure 77. SD DNR Block Diagram
< THRESHOLD?
> THRESHOLD?
CORING GAIN BORDER
BLOCK SIZE CONTROL
BLOCK SIZE CONTROL
CORING GAIN BORDER
OUTPUT
OUTPUT
CORING GAIN DATA
FILTER
FILTER
CORING GAIN DATA
BLOCK OFFSET
FILTER OUTPUT
< THRESHOLD
BLOCK OFFSET
FILTER OUTPUT
BORDER AREA
BORDER AREA
DNR CONTROL
DNR CONTROL
> THRESHOLD
GAIN
GAIN
+
+
+
–
SUBTRACT
SIGNAL IN
THRESHOLD
RANGE FROM
ORIGINAL SIGNAL
ADD SIGNAL
ABOVE
THRESHOLD
RANGE FROM
ORIGINAL SIGNAL
DNR OUT
DNR OUT