adsp-bf538f Analog Devices, Inc., adsp-bf538f Datasheet - Page 20

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adsp-bf538f

Manufacturer Part Number
adsp-bf538f
Description
Blackfin Embedded Processor
Manufacturer
Analog Devices, Inc.
Datasheet
ADSP-BF538/ADSP-BF538F
Table 10. Pin Descriptions (Continued)
Pin Name
2-Wire Interface Port
SDA0
SCL0
SDA1
SCL1
Serial Port0
RSCLK0
RFS0
DR0PRI
DR0SEC
TSCLK0
TFS0
DT0PRI
DT0SEC
Serial Port1
RSCLK1
RFS1
DR1PRI
DR1SEC
TSCLK1
TFS1
DT1PRI
DT1SEC
SPI0 Port
MOSI0
MISO0
SCK0
UART0 Port
RX0
TX0
PPI Port
PPI3–0
PPI_CLK/TMRCLK
Port C: Controller Area Network/GPIO
CANTX/PC0
CANRX/PC1
PC[9-5]
PC
4
I/O 5 V
I/O 5 V
I/O
I/O
I/O
I/O
I/O 5 V
I/O 5 V
I/O
I/O
I
I
I/O
O
O
I/O
I/O
I
I
I/O
O
O
I/O
I/O
I
O
I/O
I
I/O 5 V
I/OD 5 V CAN Receive/GPIO
I/O
I/OD 5 V
Function
These pins are open-drain and require a pull-up resistor. See version 2.1
of the I
TWI0 Serial Data
TWI0 Serial Clock
TWI1 Serial Data
TWI1 Serial Clock
SPORT0 Receive Serial Clock
SPORT0 Receive Frame Sync
SPORT0 Receive Data Primary
SPORT0 Receive Data Secondary
SPORT0 Transmit Serial Clock
SPORT0 Transmit Frame Sync
SPORT0 Transmit Data Primary
SPORT0 Transmit Data Secondary
SPORT1 Receive Serial Clock
SPORT1 Receive Frame Sync
SPORT1 Receive Data Primary
SPORT1 Receive Data Secondary
SPORT1 Transmit Serial Clock
SPORT1 Transmit Frame Sync
SPORT1 Transmit Data Primary
SPORT1 Transmit Data Secondary
SPI0 Master Out Slave In
SPI0 Master In Slave Out (This pin should always be pulled high through
a 4.7 kΩ resistor if booting via the SPI port.)
SPI0 Clock
UART0 Receive
UART0 Transmit
PPI3–0
PPI Clock/External Timer Reference
CAN Transmit/GPIO
GPIO
GPIO
Rev. A | Page 20 of 56 | January 2008
2
C specification for proper resistor values.
Driver Type
E
E
E
E
D
C
D
C
C
C
D
C
D
C
C
C
C
C
D
C
C
C
C
C
C
2
2
1

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