adsp-bf538f Analog Devices, Inc., adsp-bf538f Datasheet - Page 33

• Manufacturer Part Number: adsp-bf538f
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

External Port Bus Request and Grant Cycle Timing
Table 23
on Page 34
operations for synchronous and for asynchronous BR.
Table 23. External Port Bus Request and Grant Cycle Timing with Synchronous BR
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
t
t
t
t
BS
BH
SD
SE
DBG
EBG
DBH
EBH
and
describe external port bus request and grant cycle
Table 24 on Page 34
ARE
BR
AMSx
BGH
CLKOUT
ABE1-0
BG
ADDR19-1
AWE
BR Setup to Falling Edge of CLKOUT
Falling Edge of CLKOUT to BR Deasserted Hold Time
CLKOUT Low to AMSx, Address, and ARE/AWE Disable
CLKOUT Low to AMSx, Address, and ARE/AWE Enable
CLKOUT High to BG High Setup
CLKOUT High to BG Deasserted Hold Time
CLKOUT High to BGH High Setup
CLKOUT High to BGH Deasserted Hold Time
and
Figure 16. External Port Bus Request and Grant Cycle Timing with Synchronous BR
Figure 16
t
BS
and
Rev. A | Page 33 of 56 | January 2008
Figure 17
t
BH
t
t
t
SD
SD
SD
ADSP-BF538/ADSP-BF538F
t
t
DBG
DBH
Min
4.0
0.0
t
t
EBG
EBH
Max
4.5
4.5
3.6
3.6
3.6
3.6
t
t
t
SE
SE
SE
Unit
ns
ns
ns
ns
ns
ns
ns
ns