adsp-bf538f Analog Devices, Inc., adsp-bf538f Datasheet - Page 39

• Manufacturer Part Number: adsp-bf538f
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

Table 29. External Late Frame Sync
1
2
Parameter
Switching Characteristics
t
t
MCE = 1, TFSx enable and TFSx valid follow t
If external RFSx/TFSx setup to RSCLKx/TSCLKx > t
DDTLFSE
DTENLFS
RSCLKx
RFSx
DRx
TSCLKx
DTx
TFSx
DATA RECEIVE—INTERNAL CLOCK
DATA TRANSMIT—INTERNAL CLOCK
t
HOFSI
t
HOFSI
t
HDTI
DRIVE
DRIVE
EDGE
EDGE
Data Delay from Late External TFSx or External RFSx with MCE = 1, MFD = 0
Data Enable from late FS or MCE = 1, MFD = 0
NOTE: EITHER THE RISING EDGE OR FALLING EDGE OF RSCLKx OR TSCLKx CAN BE USED AS THE ACTIVE SAMPLING EDGE.
NOTE: EITHER THE RISING EDGE OR FALLING EDGE OF RSCLKx OR TSCLKx CAN BE USED AS THE ACTIVE SAMPLING EDGE.
t
DFSI
t
t
DDTI
DFSI
t
t
SCLKIW
SCLKIW
t
t
DTENLFS
SFSI
t
SDRI
SFSI
SCLKE
and t
SAMPLE
SAMPLE
EDGE
EDGE
/2, then t
DDTLFSE
Rev. A | Page 39 of 56 | January 2008
.
DDTTE/I
t
t
HDRI
t
HFSI
HFSI
and t
Figure 22. Serial Ports
DTENE/I
1, 2
apply; otherwise t
RSCLKx
DRx
RFSx
TSCLKx
DTx
TFSx
DATA RECEIVE—EXTERNAL CLOCK
DATA TRANSMIT—EXTERNAL CLOCK
t
t
HOFSE
HOFSE
DDTLFSE
t
HDTE
DRIVE
DRIVE
EDGE
EDGE
and t
ADSP-BF538/ADSP-BF538F
t
t
DTENLFS
DFSE
DFSE
1, 2
t
DDTE
apply.
t
t
SCLKEW
SCLKEW
Min
0
t
t
t
SFSE
SDRE
SFSE
SAMPLE
SAMPLE
EDGE
EDGE
Max
10.0
t
t
t
HDRE
HFSE
HFSE
Unit
ns
ns