mc68hc908gr16 Freescale Semiconductor, Inc, mc68hc908gr16 Datasheet - Page 211

• Manufacturer Part Number: mc68hc908gr16
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

When an SPI is configured as a master, the SS input can be used in conjunction with the MODF flag to
prevent multiple masters from driving MOSI and SPSCK. (See
the SS pin to set the MODF flag, the MODFEN bit in the SPSCK register must be set. If the MODFEN bit
is low for an SPI master, the SS pin can be used as a general-purpose I/O under the control of the data
direction register of the shared I/O port. With MODFEN high, it is an input-only pin to the SPI regardless
of the state of the data direction register of the shared I/O port.
The CPU can always read the state of the SS pin by configuring the appropriate pin as an input and
reading the port data register. See
16.12.5 CGND (Clock Ground)
CGND is the ground return for the serial clock pin, SPSCK, and the ground for the port output buffers. It
is internally connected to V
16.13 I/O Registers
Three registers control and monitor SPI operation:
16.13.1 SPI Control Register
The SPI control register:
Freescale Semiconductor
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SPI control register (SPCR)
SPI status and control register (SPSCR)
SPI data register (SPDR)
Enables SPI module interrupt requests
Configures the SPI module as master or slave
Selects serial clock polarity and phase
Configures the SPSCK, MOSI, and MISO pins as open-drain outputs
Enables the SPI module
SPE
1. X = Don’t care
0
1
1
1
A 1 voltage on the SS pin of a slave SPI puts the MISO pin in a
high-impedance state. The slave SPI ignores all incoming SPSCK clocks,
even if it was already in the middle of a transmission.
SPMSTR
X
(1))
0
1
1
MODFEN
SS
X
X
0
1
as shown in
Table
MC68HC908GR16 Data Sheet, Rev. 5.0
Table 16-3. SPI Configuration
Master without MODF
SPI Configuration
Master with MODF
Not enabled
16-3.
Table
Slave
NOTE
16-1.
General-purpose I/O; SS ignored by SPI
General-purpose I/O; SS ignored by SPI
16.7.2 Mode Fault Error.)
State of SS Logic
Input-only to SPI
Input-only to SPI
For the state of
I/O Registers
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