mc68hc908gr16 Freescale Semiconductor, Inc, mc68hc908gr16 Datasheet - Page 214

• Manufacturer Part Number: mc68hc908gr16
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Serial Peripheral Interface (SPI) Module
SPTE — SPI Transmitter Empty Bit
MODFEN — Mode Fault Enable Bit
SPR1 and SPR0 — SPI Baud Rate Select Bits
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MODFEN bit set. Clear the MODF bit by reading the SPI status and control register (SPSCR) with
MODF set and then writing to the SPI control register (SPCR). Reset clears the MODF bit.
This clearable, read-only flag is set each time the transmit data register transfers a byte into the shift
register. SPTE generates an SPTE CPU interrupt request or an SPTE DMA service request if the
SPTIE bit in the SPI control register is set also.
During an SPTE CPU interrupt, the CPU clears the SPTE bit by writing to the transmit data register.
Reset sets the SPTE bit.
This read/write bit, when set to 1, allows the MODF flag to be set. If the MODF flag is set, clearing the
MODFEN does not clear the MODF flag. If the SPI is enabled as a master and the MODFEN bit is low,
then the SS pin is available as a general-purpose I/O.
If the MODFEN bit is set, then this pin is not available as a general-purpose I/O. When the SPI is
enabled as a slave, the SS pin is not available as a general-purpose I/O regardless of the value of
MODFEN. See
If the MODFEN bit is low, the level of the SS pin does not affect the operation of an enabled SPI
configured as a master. For an enabled SPI configured as a slave, having MODFEN low only prevents
the MODF flag from being set. It does not affect any other part of SPI operation. See
Error.
In master mode, these read/write bits select one of four baud rates as shown in
SPR0 have no effect in slave mode. Reset clears SPR1 and SPR0.
Use this formula to calculate the SPI baud rate:
where:
1 = SS pin at inappropriate logic level
0 = SS pin at appropriate logic level
1 = Transmit data register empty
0 = Transmit data register not empty
CGMOUT = base clock output of the clock generator module (CGM)
BD = baud rate divisor
Baud rate
Do not write to the SPI data register unless the SPTE bit is high.
16.12.4 SS (Slave Select).
=
CGMOUT
------------------------- -
2
×
BD
Table 16-4. SPI Master Baud Rate Selection
SPR1 and SPR0
MC68HC908GR16 Data Sheet, Rev. 5.0
00
01
10
11
NOTE
Baud Rate Divisor (BD)
128
32
2
8
Table
Freescale Semiconductor
16.7.2 Mode Fault
16-4. SPR1 and