s1r72900 Epson Electronics America, Inc., s1r72900 Datasheet - Page 11

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s1r72900

Manufacturer Part Number
s1r72900
Description
Physical Layer Ic Compliant With The Ieee 1394-1995 And Ieee 1394a-2000 Standards.
Manufacturer
Epson Electronics America, Inc.
Datasheet

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6. PIN DESCRIPTION
Rev. 1.0
Pin name
AV
AV
PV
PV
V
V
OSCV
OSCV
TPA0_P
TPA0_N
TPB0_P
TPB0_N
TPBIAS0
TPA1_P
TPA1_N
TPB1_P
TPB1_N
TPBIAS1
R1, R0
PD
BCLKON
LREQ
CTL0, CTL1
D0 to D7
SCLK
LPS
PS2
PS1
PS0
DIRECT
DD
SS
DD
SS
DD
SS
DD
SS
Analog circuit power supply pin
Analog circuit ground pin
PLL circuit power supply pin
PLL circuit ground pin
Digital circuit power supply pin
Digital circuit ground pin
Oscillating circuit power supply pin
Oscillating circuit ground pin
Port 0, TPA+ I/O signal
Port 0, TPA– I/O signal
Port 0, TPB+ I/O signal
Port 0, TPB– I/O signal
Port 0, TP bias voltage supply pin
Port 1, TPA+ I/O signal
Port 1, TPA– I/O signal
Port 1, TPB+ I/O signal
Port 1, TPB– I/O signal
Port 1, TP bias voltage supply pin
Connect 6.0k (1.0%) between the
external reference resistor connecting
pins R1 and R0.
Power down input pin
Connect this pin to V
operation.
Bus Manager Contender/Link-On pin
The status of this pin determines whether
the bus manager function is used at the
time of hard reset. See 7.4.3.
Request signal from the Link layer
controller IC
PHY/LINK interface bidirectional control signal
PHY/LINK interface bidirectional data signal
49.152 MHz system clock to the Link
layer controller IC
Link power status pin.
A signal used to monitor whether the Link
layer controller IC is active.
Power status pin
These pins configure the POWER
CLASS bit of the Self-ID packet. PS0,
PS1, and PS2 are respectively bits 21,
22, 23 of the Self-ID packet.
Configured according to the isolation
barrier configuration between PHY and
LINK.
Connect this pin to V
capacitor AC connection.
Function
SS
DD
during normal
for DC or single
EPSON
32,33,39,48,49,50
30,31,42,51,52
16,25,26,62
17,18,63,64
10,11,12,13
20,21,22
Pin No.
6,7,8,9,
41,40
4,5
56
57
61
58
37
36
35
34
38
46
45
44
43
47
19
15
23
14
1
2
Differential
Differential
Differential
Differential
Differential
Differential
Differential
Differential
Hysteresis
Hysteresis
Hysteresis
Hysteresis
Hysteresis
Pin typ.
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Analog
CMOS
CMOS
CMOS
S1R72900F00A
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
I
I
I
I
I
7

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