s1r72900 Epson Electronics America, Inc., s1r72900 Datasheet - Page 43

• Manufacturer Part Number: s1r72900
• Description: Physical Layer Ic Compliant With The Ieee 1394-1995 And Ieee 1394a-2000 Standards.
• Manufacturer: Epson Electronics America, Inc.

7.4.4.3 Transmit
On receiving a bus request from the Link layer controller IC, the SIR72900F00A performs arbitration. When the
SIR72900F00A wins the arbitration, it returns Grant ('11b') for one SCLK cycle and Idle for another SCLK cycle as
Grant to the CTL pin of the Link layer controller IC
Then the Link layer controller IC inputs Transmit ('10b') or Hold ('01b') to CTL and controls the PHY/LINK interface.
However, to prevent data conflict on the CTL bus, the SIR72900F00A permits the Link layer controller IC to input Idle
('00b') for 1SCLK before inputting Transmit or Hold. (See Figure 7.22.)
The Link layer controller IC can input Hold ('01b') to CTL to reserve the bus until the data to be transmitted is prepared,
but the hold time must not exceed the MAX_HOLD time. Then it inputs Transmit ('10b) to CTL to show the valid range
of the transmitted data.
Rev. 1.0
CTL[0:1]
CTL[0:1]
CTL[0:1]
CTL[0:1]
D[0:7]
D[0:7]
PHY Drive
D[0:7]
Link Drive
D[0:7]
PHY Drive
Link Drive
Dn-1
ZZ
ZZ
10
00
00
ZZ
ZZ
ZZ
ZZ
Dn
10
ZZ
ZZ
11
00
SP
ZZ
ZZ
01
ZZ
ZZ
00
00
ZZ
ZZ
00
00
ZZ
ZZ
00
00
00
00
ZZ
ZZ
ZZ
ZZ
01
00
Figure 7.22 Transmit
ZZ
ZZ
00
EPSON
ZZ
ZZ
01
00
00
ZZ
ZZ
D0
ZZ
ZZ
10
11
00
ZZ
ZZ
D1
ZZ
ZZ
10
00
00
ZZ
ZZ
D2
00
00
ZZ
ZZ
10
01
00
ZZ
ZZ
Dn
ZZ
ZZ
10
ZZ
ZZ
01
00
ZZ
ZZ
00
00
S1R72900F00A
D0
ZZ
ZZ
00
00
10
ZZ
ZZ
D1
ZZ
ZZ
00
00
10
00
00
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