hmp8112acn Harris Corporation, hmp8112acn Datasheet
hmp8112acn
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hmp8112acn Summary of contents
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... The HMP8112A operates from a single 5V supply and is TTL/CMOS compatible. Ordering Information TEMP. o PART NUMBER RANGE ( C) PACKAGE HMP8112ACN PQFP† HMP8112EVAL2 PCI Reference Design (Includes Part) HMP8156EVAL2 Frame Grabber Evaluation Board (Includes Part) † PQFP is also known as QFP and MQFP Table of Contents Functional Block Diagrams ...
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Functional Block Diagrams HMP8112A 4-2 ...
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Functional Block Diagrams HMP8112A (Continued) VIDEO DECODER 4-3 ...
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Functional Block Diagrams ADDRESS POINTER ADDRESS POINTER CONTROL DATA BUS SERIAL SHIFT REGISTER A0 SCL SDA CONTROL INTERFACE Schematic LUMA0 C1 1.0PF LUMA1 C2 1.0PF LUMA2/Y C3 1.0PF ANTI-ALIAS FILTER CHROMA ...
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Introduction The HMP8112A is designed to decode baseband composite or s-video NTSC and PAL signals, and convert them to either digital YCbCr or RGB data. The digital PLLs are designed to synchronize to all NTSC and PAL standards. A chroma ...
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TEMPERATURE = 1.6 1.8 2.0 2.2 2.4 2.6 GAIN CONTROL VOLTAGE FIGURE 3. CHROMINANCE AMPLIFIER GAIN Reset The RESET pin is used to return the ...
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AMPLITUDE FREQUENCY AMPLITUDE FREQUENCY FIGURE 5. COMPOSITE NTSC INTERLEAVE SCHEME For PAL systems there are 283.75 cycles of chrominance per line. Chrominance information is spaced at quarter line intervals ...
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LINE # 524 525 1 VIDEO INPUT VSYNC DETECT THRESHOLD LOW TIME COUNTER HSYNC VSYNC FIELD ‘EVEN’ FIELD FIGURE 8. VSYNC TIMING AND THE EVEN TO ODD FIELD TRANSITION LINE # 262 263 264 VIDEO INPUT VSYNC DETECT THRESHOLD LOW ...
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TABLE 1. COMPATIBLE VIDEO INPUT STANDARDS COLOR 27MHz SUBCARRIER PLL STANDARD f Ratio SC NTSC 3.579545MHz 0x87C1 (M) PAL 4.43361875MHz 0xA826 ( PAL 3.57561149MHz 0x879B (M) PAL 4.43361875MHz 0xA826 (N) PAL Special 3.58205625MHz 0x97DA Combination N ...
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Hue or Tint Adjust The Hue adjustment is applied to the U and the V color dif- ference signal. The Hue adjusts the phase of the given UV data. The Hue can be adjusted by ±30 degrees in 1/4 degree ...
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NTSC M, PAL M LINES NOT ACTIVE 240 ACTIVE LINES PER FIELD (LINES 23-262) 480 ACTIVE LINES/FRAME (NTSC, PAL M) LINES 263 - 284 NOT ACTIVE 240 ACTIVE LINES PER FIELD (LINES 285 - 524) LINE 525 ...
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CLK DVLD ACTIVE Y[7- CbCr[7- DVLD NOTES the first active luminance pixel of a line due to the 4:2:2 subsampling. Y the last valid pixel in the blanking period. N ...
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I C Control Interface 2 The HMP8112A utilizes control bus interface to pro- gram the internal configuration registers. This standard mode (up to 100 KBPS) interface consists of the bidirectional Serial Data Line (SDA) and the ...
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SUB ADDR (HEX) REGISTER NAME 0x00 Video Input Control 0x01 Luminance Brightness Control 0x02 Luminance Contrast Adjust 0x03 Hue Adjust 0x04 Luminance Sharpness Control 0x05 Color Saturation Adjust 0x06 PLL Clock Frequency Ratio (LSB) 0x07 PLL Clock Frequency Ratio (MSB) ...
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BIT NUMBER FUNCTION Video Input These bits select the video input standard. Standard 00 = PAL 4.43MHz subcarrier; 50fps; 625 lines/frame PAL M; 3.58MHz subcarrier; 60fps; 525 lines/frame ...
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TABLE 8. LUMINANCE CONTRAST ADJUST REGISTER BIT NUMBER FUNCTION Luminance Contrast This register sets the contrast adjust factor which is applied after the brightness. This val- Adjust Factor ue is multiplied by the luminance data and allows ...
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TABLE 11. COLOR SATURATION ADJUST FACTOR BIT NUMBER FUNCTION Color Saturation This register sets the color saturation adjust factor. This value is multiplied by the chromi- Adjust Factor nance (CbCr) data and allows the data to be ...
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TABLE 14. HAGC START TIME (LSB) REGISTER BIT NUMBER FUNCTION HAGC This register provides a programmable delay for the HAGC pulse that control the sync START Time (LSB) tip AGC in the A/D converters. This is the ...
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BIT NUMBER FUNCTION HSYNC Pulse This register provides a programmable delay for the external HSYNC pulse. This is the END Time (LSB) lower byte of the 10-bit word. TABLE 21. HSYNC END TIME (MSB) REGISTER BIT NUMBER ...
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TABLE 26. DC RESTORE END TIME (LSB) REGISTER BIT NUMBER FUNCTION RESTORE This register provides a programmable delay for the internal DC RESTORE signal. This END Time (LSB) is the lower byte of the 10-bit word. ...
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TABLE 29. SOFTWARE RESET AND VIDEO STATUS REGISTER BIT NUMBER FUNCTION 7 Software Reset When this bit is set to 1, the entire device except the I exactly like the RESET input. The software reset will initialize all register bits ...
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Pinout AGND V AA AGND NC LIN2 LIN1 LIN0 L_ADIN L_OUT AGND AGND V AA CLK V AA AGND AGND A/D_TEST NC CIN NC NOTE: 7. Refer to Pin Description for this pin. HMP8112A 80 LEAD PQFP TOP VIEW 80 ...
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Pin Description PQFP PIN INPUT/ NAME NUMBER OUTPUT LIN0 7 Input LIN1 6 Input LIN2 5 Input CIN 19 Input WPE 27 Input GAIN_CTRL 28 Input DEC_T 78 Input DEC_L 30 Input LAGC_CAP 77 Input LCLAMP_CAP 76 Input CCLAMP_CAP 29 ...
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Pin Description (Continued) PQFP PIN INPUT/ NAME NUMBER OUTPUT CbCr[0:7] 42, 43, 45, Output 47-51 Y[0:7] 54-58, 60, 63, Output 64 DVLD 66 Output HSYNC 71 Output VSYNC 70 Output FIELD 67 Output ACTIVE 65 Output TEST 36 Input V ...
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... Input Logic High Voltage Input Logic Low Voltage Input Logic Current HMP8112A Thermal Information Thermal Resistance (Typical, See Note 8) 0.5V PQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . CC Maximum Power Dissipation HMP8112ACN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.9W Maximum Storage Temperature Range . . . . . . . . . .-65 Maximum Junction Temperatures . . . . . . . . . . . . . . . . . . . . . 150 Maximum Lead Temperature (Soldering 10s 300 ...
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Electrical Specifications V = 5.0V PARAMETER Output Logic High Voltage Output Logic Low Voltage Output Logic Current Three-State Output Current Leakage DIGITAL I/O (SDA, SCL, Fast Mode) Input Logic High Voltage Input Logic Low Voltage ...
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Electrical Specifications V = 5.0V PARAMETER VIDEO PERFORMANCE Differential Gain Differential Phase Integral Linearity Differential Linearity SNR Luminance to Chrominance Crosstalk Chrominance to Luminance Crosstalk Horizontal Locking and Recovery Time # of Missing Horizontal Syncs Before Lost Lock ...
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Typical Performance Curves NTSC Composite Phase HMP8112A FIGURE 19. COLOR BARS NTSC 100% (EIA) FIGURE 20. COLOR BARS VECTORSCOPE 4-28 ...
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Typical Performance Curves NTSC Composite Phase (Continued) HMP8112A (Continued) FIGURE 21. COLOR BARS VM700 TEST FIGURE 22. DIFFERENTIAL PHASE AND GAIN 4-29 ...
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Typical Performance Curves NTSC Frequency Response FIGURE 24. MULTIBURST VM700 FREQUENCY ROLL-OFF TEST HMP8112A (Continued) FIGURE 23. MULTIBURST 4-30 ...
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Typical Performance Curves NTSC Noise Measurements FIGURE 25. SIGNAL TO NOISE RATIO - FLAT FREQUENCY RESPONSE FIGURE 26. SIGNAL TO NOISE RATIO - 5.0MHz LOW PASS FILTERED HMP8112A (Continued) 4-31 ...
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Typical Performance Curves NTSC Noise Measurements (Continued) FIGURE 27. SIGNAL TO NOISE RATIO - 4.2MHz LOW PASS FILTERED Pixel Jitter Test FIGURE 28. LONG TERM JITTER - 20 PULSE BAR 2T HMP8112A (Continued) 4-32 ...
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Typical Performance Curves PAL Composite Phase HMP8112A (Continued) FIGURE 29. COLOR BARS NTSC 100% (EIA) FIGURE 30. COLOR BARS VECTORSCOPE 4-33 ...
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Typical Performance Curves PAL Composite Phase (Continued) HMP8112A (Continued) FIGURE 31. COLOR BARS VM700 TEST FIGURE 32. DIFFERENTIAL PHASE AND GAIN 4-34 ...
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Typical Performance Curves PAL Frequency Response HMP8112A (Continued) FIGURE 33. MULTIBURST FIGURE 34. NTSC MULTI-TEST PATTERN 4-35 ...
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Typical Performance Curves FIGURE 35. NTSC CONVERGENCE TEST PATTERN HMP8112A (Continued) FIGURE 36. NTSC MULTIBURST TEST PATTERN 4-36 ...
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Typical Performance Curves FIGURE 37. NTSC SMPTE COLORBARS TEST PATTERN HMP8112A (Continued) FIGURE 38. PAL CONVERGENCE TEST PATTERN 4-37 ...
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Typical Performance Curves FIGURE 40. PAL SMPTE COLORBARS TEST PATTERN HMP8112A (Continued) FIGURE 39. PAL MULTIBURST TEST PATTERN 4-38 ...
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... VM700 video test system. Related Application Notes Application Notes are also available on the Harris Multimedia web site at: http://www.semi.harris.com/datasheets/mmedia. AN9644: Composite Video Separation Techniques AN9716: Widescreen Signalling AN9717: YCbCr to RGB Considerations power plane that is AN9728: BT ...
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Metric Plastic Quad Flatpack Packages (MQFP/PQFP - ...