tmp86fh09amg TOSHIBA Semiconductor CORPORATION, tmp86fh09amg Datasheet - Page 121

no-image

tmp86fh09amg

Manufacturer Part Number
tmp86fh09amg
Description
8 Bit Microcontroller Tlcs-870/c Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
tmp86fh09amg(C
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
Part Number:
tmp86fh09amg(C,ZHZ
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
11.2.2
11.2.3
(0028H)
(0029H)
SEDR
SESR
fer is initiated by writing to this SEDR register. If the master device needs to write to the SEDR register af-
ter transfer began, always check to see by means of an interrupt or by polling that the SEF flag
(SESR<SEF>) is set, before writing to the SEDR register.
Note 1: The SEF flag is automatically set at completion of transfer. The SEF flag thus set is automatically cleared by read-
Note 2: The WCOL flag is automatically set by a write to the SEDR register while transfer is in progress. Writing to the
Note 3: During master mode:
The SEI Data Register (SEDR) is used to send and receive data. When the SEI is set for master, data trans-
SED7
SEI Status Register (SESR)
SEI Data Register (SEDR)
SEF
7
7
(2)
WCOL
SOVF
SEF
the SER bit has no effect. The maximum transfer rate is fc/4.
ing the SESR register and accessing the SEDR register.
SEDR register during transfer has no effect. The WCOL flag thus set is automatically cleared by reading the
SESR register and accessing the SEDR register. No interrupts are generated for reasons that the WCOL flag is
set.
This bit does not function; its data when read is “0”.
During slave mode:
The SOVF flag is automatically set when the device finishes reading the next data while the SEF flag is set. The
SOVF flag thus set is automatically cleared by reading the SESR register and accessing the SEDR register. The
SOVF flag also is cleared by a switchover to master mode. No interrupts are generated for reasons that the
SOVF flag is set.
When the SEI is operating as a slave, the serial clock is input from the master and the setting of
Note:Take note of the following relationship between the serial clock speed and fc on the master
Slave mode
WCOL
SED6
6
6
Transfer-finished flag (Note1)
Write collision error flag (Note2)
Overflow error flag (slave) (Note3)
side:
15.625 kbps ≤ Transfer rate ≤ fc/4 bps
Example) 15.625 kbps ≤ Transfer rate ≤ 4 Mbps (fc = 16 MHz at V
15.625 kbps ≤ Transfer rate ≤ 2 Mbps (fc = 8 MHz at V
SOVF
SED5
5
5
SED4
4
4
SED3
3
3
Page 111
SED2
2
2
0: Transfer in progress
1: Transfer completed
0: No write collision error occurred
1: Write collision error occurred
0: No overflow occurred
1: Overflow occurred
SED1
1
1
DD
SED0
0
0
= 2.7 to 5.5 V)
(Initial value: 0000 ****)
R/W (Initial value: 0000 0000)
DD
= 4.5 to 5.5 V)
TMP86FH09AMG
Read
only

Related parts for tmp86fh09amg