tmp86fh09amg TOSHIBA Semiconductor CORPORATION, tmp86fh09amg Datasheet - Page 49
tmp86fh09amg
Manufacturer Part Number
tmp86fh09amg
Description
8 Bit Microcontroller Tlcs-870/c Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP86FH09AMG.pdf
(198 pages)
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External Interrupt Control Register
EINTCR
(0037H)
Note 1: In NORMAL1/2 or IDLE1/2 mode, if a signal with no noise is input on an external interrupt pin, it takes a maximum of
Note 2: When INT0EN = "0", IL4 is not set even if a falling edge is detected on the INT0 pin input.
Note 3: When a pin with more than one function is used as an output and a change occurs in data or input/output status, an in-
Note 1: fc: High-frequency clock [Hz], *: Don’t care
Note 2: When the system clock frequency is switched between high and low or when the external interrupt control register
Source
INT0
INT1
INT3
INT4
INT5
INT1NC
"signal establishment time + 6/fs[s]" from the input signal's edge to set the interrupt latch.
terrupt request signal is generated in a pseudo manner. In this case, it is necessary to perform appropriate process-
ing such as disabling the interrupt enable flag.
(EINTCR) is overwritten, the noise canceller may not operate normally. It is recommended that external interrupts are
disabled using the interrupt enable register (EIR).
7
INT1NC
INT0EN
INT4 ES
INT3 ES
INT1 ES
INT0
INT1
INT3
INT4
INT5
Pin
INT0EN
6
IMF × EF4 × INT0EN=1
IMF × EF5 = 1
IMF × EF11 = 1
and
IL11ER=1
IMF × EF14 = 1
IMF × EF15 = 1
Noise reject time select
P10/INT0 pin configuration
INT4 edge select
INT3 edge select
INT1 edge select
Enable Conditions
5
INT3ES
4
Falling edge
Falling edge
or
Rising edge
Falling edge,
Rising edge,
Falling and Rising edge
or
H level
Falling edge,
Rising edge,
Falling and Rising edge
or
H level
Falling edge
3
Page 39
Release Edge (level)
INT4ES
0: Pulses of less than 63/fc [s] are eliminated as noise
1: Pulses of less than 15/fc [s] are eliminated as noise
0: P10 input/output port
1: INT0 pin (Port P10 should be set to an input mode)
00: Rising edge
01: Falling edge
10: Rising edge and Falling edge
11: "H" level
00: Rising edge
01: Falling edge
10: Rising edge and Falling edge
11: "H" level
0: Rising edge
1: Falling edge
2
INT1ES
1
Pulses of less than 2/fc [s] are eliminated as
noise. Pulses of 7/fc [s] or more are consid-
ered to be signals. In the SLOW or the SLEEP
mode, pulses of less than 1/fs [s] are elimina-
ted as noise. Pulses of 3.5/fs [s] or more are
considered to be signals.
Pulses of less than 15/fc or 63/fc [s] are elimina-
ted as noise. Pulses of 49/fc or 193/fc [s] or
more are considered to be signals. In the
SLOW or the SLEEP mode, pulses of less
than 1/fs [s] are eliminated as noise. Pulses of
3.5/fs [s] or more are considered to be signals.
Pulses of less than 7/fc [s] are eliminated as
noise. Pulses of 25/fc [s] or more are consid-
ered to be signals. In the SLOW or the
SLEEP mode, pulses of less than 1/fs [s] are
eliminated as noise. Pulses of 3.5/fs [s] or
more are considered to be signals.
Pulses of less than 7/fc [s] are eliminated as
noise. Pulses of 25/fc [s] or more are consid-
ered to be signals. In the SLOW or the
SLEEP mode, pulses of less than 1/fs [s] are
eliminated as noise. Pulses of 3.5/fs [s] or
more are considered to be signals.
Pulses of less than 2/fc [s] are eliminated as
noise. Pulses of 7/fc [s] or more are consid-
ered to be signals. In the SLOW or the SLEEP
mode, pulses of less than 1/fs [s] are elimina-
ted as noise. Pulses of 3.5/fs [s] or more are
considered to be signals.
0
Digital Noise Reject
(Initial value: 0000 000*)
TMP86FH09AMG
R/W
R/W
R/W
R/W
R/W
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