w6692 Winbond Electronics Corp America, w6692 Datasheet - Page 69

• Manufacturer Part Number: w6692
• Description: Pci Bus Isdn S/t-controller
• Manufacturer: Winbond Electronics Corp America

GRLP
SPU
PD
GMODE
8.1.33 Peripheral Address Register
Value after reset: Undefined
The register content depends on PCTL:XMODE setting.
SPU
0: Layer 1 is S/T interface; GCI is in master mode. This is default setting.
1: Layer 1 is U interface; GCI is in slave mode.
XMODE = 0 : Simple IO mode
IO1-0
IO3-2
0
1
0
1
On read operation, these are the present values of pins IO1-0.
On write operation, the data are driven to pins IO1-0 only if PCTL:OE0=1.
On read operation, these are the present values of pins IO3-2.
IO7
7
Software Power Up
Power Down
GCI Mode Remote Loop-back
.
PD
Read or Write Data of Pins IO1-0
Read or Write Data of Pins IO3-2
1
0
0
1
GCI Mode
IO6
Setting this bit to 1 activates the remote loop-back function. The 2B+D channels data received from the GCI bus
interface are looped to the transmitted channels.
6
After U transceiver power down, W6692 will receive the indication DC (Deactivation Confirmation) from
GCI bus and then software has to set SPU
Setting SPU
devices (U transceiver) to deliver GCI bus clocking.
After reception of the indication PU (Power Up indication) the reaction of the microprocessor should be:
Unused.
- To write an AR (Activate Request command) as C/I command code in the CIX register.
- To reset the SPU bit and wait for the following ICC (indication code change) interrupt.
IO5
5
1, PD
IO4
4
0 will pull the GCI bus DOUT line to low. This will enforce connected layer 1
IO3
3
XADDR
IO2
2
-69 -
0, PD
Description
IO1
1
1 to enter Power Down state.
Read/Write
IO0
W6692 PCI ISDN S/T-Controller
0
Publication Release Date:
Preliminary Data Sheet
Address F4H/3DH
Sep 30, 1999
Revision 0.9