w6692 Winbond Electronics Corp America, w6692 Datasheet - Page 78

• Manufacturer Part Number: w6692
• Description: Pci Bus Isdn S/t-controller
• Manufacturer: Winbond Electronics Corp America

XME
the data in FIFO and automatically appends the CRC and the closing flag sequence in transparent mode.
XRST
pattern on B channel in transparent mode, or idle pattern in extended transparent mode. This command also results in a transmit
FIFO ready condition.
8.2.4 B1_ch Mode Register B1_MODE
Value after reset: 00H
MMS
are stored in B1_RFIFO. Flag deletion, CRC check and zero bit deletion are performed. In transmit direction, the data is
transmitted with flag insertion, zero bit insertion and CRC generation.
all data in the B1_XFIFO are transmitted without alteration.
ITF
EPCM
BSW1-0
This bit is write-only. It's auto-clear.
This bit is write only. It's auto-clear.
Setting this bit resets the B1_ch HDLC transmitter and clears the B1_XFIFO. The transmitter will send inter frame time fill
MMS
In extended transparent mode, setting this bit stops the B1_XFIFO data transmission.
Determines the message transfer modes of the B1_ch HDLC controller:
Defines the inter-frame time fill pattern in transparent mode.
0 : Mark. The binary value "1" is transmitted.
1 : Flag. This is a sequence of "01111110".
0 : Disable data transmit/ receive to/from PCM port. The frame synchronization clock PFCK1 is held LOW.
1 : Enable data transmit/ receive to/from PCM port. The frame synchronization clock PFCK1 is active.
These two bits determine the connection in B1 channel:
In transparent mode, setting this bit indicates the end of the whole frame transmission. The B1_ch HDLC controller transmits
0: Transparent mode. In receive direction, address comparison is performed on each frame. The frames with matched address
1: Extended transparent mode. In receive direction, all data are received and stored in the B1_RFIFO. In transmit direction,
7
Inter-frame Time Fill
Transmit Message End
Message Mode Setting
Transmitter Reset
Enable PCM Transmit/Receive
B Channel Switching Select
ITF
BSW1
6
0
0
1
EPCM
5
BSW0
0
1
0
BSW1
4
Connection
Layer 1
Layer 1
HDLC
BSW0
3
PCM
HDLC
Read/Write
PCM
SW56
2
-78 -
FTS1
1
FTS0
0
Address 8CH/23H
W6692 PCI ISDN S/T-Controller
Publication Release Date:
Preliminary Data Sheet
Sep 30, 1999
Revision 0.9