ADF4106 Analog Devices, ADF4106 Datasheet - Page 11

• Manufacturer Part Number: ADF4106
• Description: PLL Frequency Synthesizer
• Manufacturer: Analog Devices

X
= DON’T CARE
DB23
BOTH OF THESE BITS
MUST BE SET TO 0 FOR
NORMAL OPERATION
X
RESERVED
DB22
0
DB21
0
LDP
0
1
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9
LDP
SHOULD BE SET
TO 00 FOR NORMAL
TEST MODE BITS
OPERATION
MODE BITS
T2
TEST
OPERATION
THREE CONSECUTIVE CYCLES OF PHASE DELAY LESS THAN
15ns MUST OCCUR BEFORE LOCK DETECT IS SET.
FIVE CONSECUTIVE CYCLES OF PHASE DELAY LESS THAN
15ns MUST OCCUR BEFORE LOCK DETECT IS SET.
T1
ABP2
0
0
1
1
ABP2
BACKLASH
WIDTH
ANTI-
ABP1
ABP1
0
1
0
1
Table III. Reference Counter Latch Map
R14
ANTIBACKLASH PULSEWIDTH
2.9ns
1.3ns
6.0ns
2.9ns
R13
R14
0
0
0
0
.
.
.
1
1
1
1
R12
R11
R13
0
0
0
0
.
.
.
1
1
1
1
R10
14-BIT REFERENCE COUNTER
R9
R12
0
0
0
0
.
.
.
1
1
1
1
R8
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
..........
DB8
R7
DB7
R6
R3
0
0
0
1
.
.
.
1
1
1
1
DB6
R5
DB5
R4
R2
0
1
1
0
.
.
.
0
0
1
1
DB4
R3
DB3
R2
R1
1
0
1
0
.
.
.
0
1
0
1
ADF4106
DB2
R1
C2 (0) C1 (0)
DB1
DIVIDE RATIO
1
2
3
4
.
.
.
16380
16381
16382
16383
CONTROL
BITS
DB0