ADF4106 Analog Devices, ADF4106 Datasheet - Page 8

• Manufacturer Part Number: ADF4106
• Description: PLL Frequency Synthesizer
• Manufacturer: Analog Devices

ADF4106
CIRCUIT DESCRIPTION
REFERENCE INPUT SECTION
The Reference Input stage is shown in Figure 2. SW1 and SW2
are normally-closed switches. SW3 is normally-open. When
Powerdown is initiated, SW3 is closed and SW1 and SW2 are
opened. This ensures that there is no loading of the REF
on power-down.
RF INPUT STAGE
The RF input stage is shown in Figure 3. It is followed by a 2-stage
limiting amplifier to generate the CML clock levels needed for the
prescaler.
RF
RF
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
REF
IN
IN
50
A
B
V
V
IN
DD
P
= 3V
= 3V
NC
POWER-DOWN
GENERATOR
100
SW1
CONTROL
PRESCALER OUTPUT FREQUENCY
BIAS
NO
NC
500
SW2
SW3
150
100k
1.6V
NC = NO CONNECT
200
500
BUFFER
AGND
AV
250
DD
TO R COUNTER
300
IN
pin
PRESCALER (P/P + 1)
The dual modulus prescaler (P/P + 1), along with the A and
B counters, enables the large division ratio, N, to be realized
(N = BP + A). The dual-modulus prescaler, operating at CML
levels, takes the clock from the RF input stage and divides it
down to a manageable frequency for the CMOS A and B
counters. The prescaler is programmable. It can be set in soft-
ware to 8/9, 16/17, 32/33 or 64/65. It is based on a synchronous
4/5 core. There is a minimum divide ratio possible for fully
contiguous output frequencies. This minimum is determined by
P, the prescaler value and is given by: (P
A AND B COUNTERS
The A and B CMOS counters combine with the dual modulus
prescaler to allow a wide ranging division ratio in the PLL feed-
back counter. The counters are specified to work when the
prescaler output is 300 MHz or less. Thus, with an RF input
frequency of 4.0 GHz, a prescaler value of 16/17 is valid but a
value of 8/9 is not valid.
Pulse Swallow Function
The A and B counters, in conjunction with the dual modulus
prescaler make it possible to generate output frequencies which
are spaced only by the Reference Frequency divided by R. The
equation for the VCO frequency is as follows:
f
P
B
A
f
VCO
REFIN
–2
–4
–6
Output Frequency of external voltage controlled
oscillator (VCO).
Preset modulus of dual modulus prescaler
(8/9, 16/17, etc.,).
Preset Divide Ratio of binary 13-bit counter
(3 to 8191).
Preset Divide Ratio of binary 6-bit swallow
counter (0 to 63).
External reference frequency oscillator.
6
4
2
0
0
0.5
f
VCO
1.0
=
1.5
[(
P
2.0
×
B
V
CP
)
2.5
+
– V
A
]
3.0
×
2
f
REFIN
– P).
3.5
R
V
I
CP
P
= 5V
4.0
= 5mA
4.5
5.0