ADF4106 Analog Devices, ADF4106 Datasheet - Page 5

• Manufacturer Part Number: ADF4106
• Description: PLL Frequency Synthesizer
• Manufacturer: Analog Devices

Mnemonic
R
CP
CPGND
AGND
RF
RF
AV
REF
DGND
CE
CLK
DATA
LE
MUXOUT
DV
V
SET
P
IN
IN
DD
DD
IN
B
A
CPGND
Function
Connecting a resistor between this pin and CPGND sets the maximum charge pump output current. The nominal
voltage potential at the R
So, with R
Charge Pump Output. When enabled this provides ± I
external VCO.
Charge Pump Ground. This is the ground return path for the charge pump.
Analog Ground. This is the ground return path of the prescaler.
Complementary Input to the RF Prescaler. This point must be decoupled to the ground plane with a small bypass
capacitor, typically 100 pF. See Figure 3.
Input to the RF Prescaler. This small signal input is ac coupled to the external VCO.
Analog Power Supply. This may range from 2.7 V to 3.3 V. Decoupling capacitors to the analog ground plane
should be placed as close as possible to this pin. AV
Reference Input. This is a CMOS input with a nominal threshold of V
100 kΩ. See Figure 2. This input can be driven from a TTL or CMOS crystal oscillator or it can be ac coupled.
Digital Ground
Chip Enable. A logic low on this pin powers down the device and puts the charge pump output into three-state
mode. Taking the pin high will power up the device depending on the status of the power-down bit F2.
Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched into the
24-bit shift register on the CLK rising edge. This input is a high impedance CMOS input.
Serial Data Input. The serial data is loaded MSB first with the two LSBs being the control bits. This input is a
high impedance CMOS input.
Load Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into one of the four
latches, the latch being selected using the control bits.
This multiplexer output allows either the Lock Detect, the scaled RF or the scaled Reference Frequency to be
accessed externally.
Digital Power Supply. This may range from 2.7 V to 3.3 V. Decoupling capacitors to the digital ground plane
should be placed as close as possible to this pin. DV
Charge Pump Power Supply. This should be greater than or equal to V
set to 5 V and used to drive a VCO with a tuning range of up to 5 V.
AGND
RF
RF
REF
AV
R
SET
IN
IN
CP
DD
B
A
IN
1
2
3
4
5
6
7
8
(Not to Scale)
ADF4106
TOP VIEW
TSSOP
SET
= 5.1 kΩ, I
16
15
14
13
12
11
10
9
DV
MUXOUT
LE
DATA
CLK
CE
DGND
V
P
DD
SET
CPMAX
NOTE: TRANSISTOR COUNT 6425 (CMOS), 303 (BIPOLAR)
pin is 0.6 V. The relationship between I
PIN FUNCTION DESCRIPTIONS
= 5 mA.
PIN CONFIGURATIONS
I
CP MAX
= 25 5 .
R
DD
DD
SET
CP
must be the same value as DV
must be the same value as AV
to the external loop filter, which in turn drives the
CPGND 1
AGND 2
AGND 3
RF
RF
CP
IN
IN
DD
B 4
A 5
DD
and R
Chip Scale Package
/2 and a dc equivalent input resistance of
. In systems where V
SET
ADF4106
TOP VIEW
PIN 1
INDICATOR
is
DD
DD
.
.
15 MUXOUT
14 LE
13 DATA
12 CLK
11 CE
DD
ADF4106
is 3 V, it can be