bt848kpf ETC-unknow, bt848kpf Datasheet - Page 57

• Manufacturer Part Number: bt848kpf
• Description: Single-chip Video Capture For Pci
• Manufacturer: ETC-unknow

Bt848/848A/849A
Single-Chip Video Capture for PCI
Brooktree
®
DMA Controller
The Bt848 incorporates a unique DMA controller architecture which gives the
capture system great flexibility in its ability to deliver data to memory. It is archi-
tected as a small RISC engine which runs on a set of instructions generated and
maintained in host system memory by the Bt848 device driver software.
from one video line to the next. This enables multiple memory targets to be estab-
lished for various components of each video frame. For example, an NTSC video
frame contains four discrete components which require separate target memory lo-
cations: even field video image data, odd field video image data, line 21 closed
captioning data and line 15 teletext data. The Bt848 DMA can concurrently sup-
port a display memory target for the even field image, and three separate system
memory targets for the odd field image, line 21 data and line 15 data respectively.
controller. The RISC program resides in host system memory. Through the use of
the PCI target, the RISC program puts its own starting address in a Bt848 register
and makes it available to the DMA controller. The DMA controller then requests
that the PCI initiator fetch an instruction. The RISC instructions available are
WRITE, SKIP, SYNC, and JUMP.
controller presents the data to the PCI initiator and requests that the data be output
to the target memory. The PCI initiator outputs the pixel data on the PCI bus after
gaining access to the PCI bus. It is the responsibility of the DMA controller to pre-
vent and manage the overflow of the Bt848 FIFOs. This is illustrated in Figure 23.
In this architecture, the DMA can dynamically change target memory address
The Bt848 device driver software creates a RISC program which runs the DMA
The decoded composite video data is stored in the Bt848 FIFOs and the DMA
L848A_A
F
UNCTIONAL
DMA Controller
D
ESCRIPTION
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