bt848kpf ETC-unknow, bt848kpf Datasheet - Page 60

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bt848kpf

Manufacturer Part Number
bt848kpf
Description
Single-chip Video Capture For Pci
Manufacturer
ETC-unknow
Datasheet

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F
DMA Controller
Table 11. RISC Instructions (1 of 4)
50
UNCTIONAL
WRITE
WRITE123
Instruction
D
ESCRIPTION
0001
1001
Opcode
DWORDs
2
5
Write packed mode pixels to memory from the FIFO beginning at the specified
target address.
DWORD0:
[11:0]
[15:12]
[23:16]
[24]
[25]
[26]
[27]
[31:28]
DWORD1:
[31:0]
Write pixels to memory in planar mode from the FIFOs beginning at the speci-
fied target addresses.
DWORD0:
[11:0]
[15:12]
[23:16]
[24]
[25]
[26]
[27]
[31:28]
DWORD1:
[11:0]
[27:16]
DWORD2:
[31:0]
DWORD3:
[31:0]
DWORD4:
[31:0]
Byte Count
Byte Enables
Reset/Set RISC_STATUS
IRQ
Reserved
EOL
SOL
Opcode
32-bit Target Address
Byte Count #1
Byte Enables
Reset/Set RISC_STATUS
IRQ
Reserved
EOL
SOL
Opcode
Byte Count #2
Byte count #3
32-bit Target Address
32-bit Target Address
32-bit Target Address
L848A_A
Description
Byte Address of first pixel byte.
Byte transfer count from FIFO1
Byte transfer count from FIFO2
Byte transfer count from FIFO3
Byte Address for Y data from FIFO1
Byte Address for Cb data from FIFO2
Byte Address for Cr data from FIFO3
Single-Chip Video Capture for PCI
Bt848/848A/849A
Brooktree
®

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