MM908E622ACDWBR2 FREESCALE [Freescale Semiconductor, Inc], MM908E622ACDWBR2 Datasheet - Page 45

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MM908E622ACDWBR2

Manufacturer Part Number
MM908E622ACDWBR2
Description
Integrated Quad Half-bridge, Triple High Side and EC Glass Driver with Embedded MCU and LIN for High End Mirror
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
thermal destruction!
VIS — Over /Under-voltage Interrupt Shutdown
HVI. Reset clears the VIS bit.
SRS0-1 — LIN Slew rate Select Bits
appropriate LIN slew rate for different Baudrate
configurations. Reset clears the SRS1:0 bits.
Table 11. LIN Slew Rate Selection Bits
programming via the LIN, and are not intended for use in the
application.
System Status Register (SYSSTAT)
LINCL — LIN Current Limitation Bit
the current limitation region. Due to excessive power
dissipation in the transmitter, the driver will be automatically
turned off after a certain time.
HTIF— Over-temperature Status Bit
Flag register
Analog Integrated Circuit Device Data
Freescale Semiconductor
Reset
Read
Write
The user must take care to protect the device against
This read/write bit selects the power stage behavior at LVI/
These read/write bits enable the user to select the
The high speed slew rates are used, for example, for
This read only bit is set if the LIN transmitter operates in
This read only bit is a copy of the HTIF bit in the Interrupt
SRS1
0
0
1
1
1 = automatic LVI/HVI shutdown disabled
0 = automatic LVI/HVI shutdown enabled
1 = transmitter operating in current limitation region
0 = transmitter not operating in current limitation region
1 = over-temperature condition
0 = no over-temperature condition
LINC
Register Name and Address: SYSSTAT - $0C
Bit7
L
0
SRS0
HTIF
0
1
0
1
6
0
VF
5
0
H0F
Initial Slew Rate (20kBaud)
Slow Slew Rate (10kBaud)
4
0
High Speed II (8x)
High Speed I (4x)
HVD
DF
3
0
Slew rate
HSF
2
0
HBF
1
0
ECF
Bit0
0
VF — Voltage Failure Bit
of the allowed range. The bit is set if either the LVIF or the
HVIF in the Interrupt Flag register are set.
H0F — H0 Failure Bit
Status and Control Register (HLSCTL)
HVDDF— HVDD Failure Bit
Side Status register
HSF— HS1:3 Failure Bit
side outputs is present
HBF— HB1:4 Failure Bit
bridge outputs is present.
This read only bit indicates that the supply voltage was out
This read only bit is a copy of the H0OCF bit in the H0/L0
This read only bit is a copy of the HVDDOCF bit in the High
This read only bit is set if a fail condition on one of the high
This read only bit is set if a fail condition on one of the half-
1 = low/high voltage condition detected
0 = no voltage failure condition detected
1 = over-current detected on H0
0 = no over-current on H0
1 = HVDD pin fail
0 = HVDD normal operating
1 = HS1:3 pin fail
0 = HS1:3 normal operating
1 = HB1:4 pin over-current fail
0 = HB1:4 normal operating
HS1OCF
HS2OCF
HS3OCF
HB1OCF
HB2OCF
HB3OCF
HB4OCF
Figure 28. HBF Flag Generation
Figure 27. HSF flag generation
Figure 26. VF Flag Generation
HVIF
LVIF
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
HBF
HSF
VF
908E622
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