DP83950BNU NSC [National Semiconductor], DP83950BNU Datasheet - Page 40

• Manufacturer Part Number: DP83950BNU
• Manufacturer: NSC [National Semiconductor]

Signal Pin
5 0 Functional Description
Maximum Mode LED Definitions
This shows the LED Output Functions for the LED Drivers when 74LS259s are used The top table refers to the bank of 4 74LS259s latched with STR0 and the
lower table refers to the bank of 4 74LS259s latched with STR1 For example the RIC’s D0 data signal goes to 259
LINK LEDs)
Note ACOL
PART
259 Output
259 Addr S2 –0
RIC Port Number
RIC D0 259
RIC D1 259
RIC D2 259
RIC D3 259
RIC D4 259
259 Output
259 Addr S2 –0
RIC Port Number
RIC D0 259
RIC D1 259
RIC D2 259
RIC D3 259
RIC D4 259
Name
D(7 5)
STR0
STR1
D0
D1
D2
D3
D4
e
Port Partitioned BDPOL
e
Any Port Collision AREC
Provides status information concerning the Link Integrity status of 10BASE-T segments This signal should be
connected to the data inputs of the chosen pair of 74LS259 latches
Provides status information indicating if there is a collision occurring on one of the segments attached to this RIC
This signal should be connected to the data inputs of the chosen pair of 74LS259 latches
Provides status information indicating if one of this RIC’s ports is receiving a data or a collision packet from its
segment This signal should be connected to the data inputs of the chosen pair of 74LS259 latches
Provides Status information indicating that the RIC has experienced a jabber protect condition Additionally it
denotes which of its ports are partitioned This signal should be connected to the data inputs of the chosen pair of
74LS259 latches
Provides status information indicating if one of this RIC’s ports is receiving data of inverse polarity This status
output is only valid if the port is configured to use its internal 10BASE-T transceiver The signal should be
connected to the data inputs of the chosen pair of 74LS259 latches
These signals provide the repeater port address corresponding to the data available on D(4 0)
This signal is the latch enable for the lower byte latches that is the 74LS259s which display information concerning
ports 1 to 7
This signal is the latch enable for the upper byte latches that is the 74LS259s which display information concerning
ports 8 to 13
1
2
3
4
5
6
7
8
9
10
ACOL
AREC
BDPOL
JAB
000
Q0
PART
LINK
COL
REC
000
e
Q0
8
Bad (inverse) Polarity or received data
Table 5 3 Status Display Pin Functions in MAXIMUM MODE
e
Any Port Reception JAB
1 (AUI)
PART
COL
REC
001
Q1
BDPOL
PART
LINK
REC
COL
74LS259 (or Equiv ) Latch Inputs
001
Q1
9
(Continued)
74LS259 Latch Inputs
BDPOL
PART
LINK
COL
REC
010
Q2
2
BDPOL
PART
LINK
REC
COL
Function in Maximum Mode
010
e
Q2
10
FIGURE 5 12
Any Port Jabbering LINK
40
BDPOL
PART
LINK
REC
COL
011
Q3
3
BDPOL
PART
LINK
REC
COL
011
e
Q3
11
STR0
e
BDPOL
PART
LINK
COL
REC
e
STR1
100
Q4
4
Port Link COL
BDPOL
PART
LINK
COL
REC
100
Q4
12
1 and
BDPOL
PART
LINK
COL
REC
101
Q5
e
5
Port Collision REC
5 These two 74LS259s then drive the
BDPOL
PART
LINK
COL
REC
101
Q5
13
BDPOL
PART
LINK
COL
REC
110
Q6
6
110
e
Q6
Port Reception
BDPOL
PART
LINK
COL
REC
111
Q7
7
111
Q7