DP83950BNU NSC [National Semiconductor], DP83950BNU Datasheet - Page 59

• Manufacturer Part Number: DP83950BNU
• Manufacturer: NSC [National Semiconductor]

Bit
D0
D1
D2
D3
D4
D5
D6
D7
8 0 RIC Registers
RIC Configuration Register (Address 0EH)
This register displays the state of a number of RIC configuration bits loaded during the Mode Load operation
MINMAX
D7
R W
R
R
R
R
R
R
R
R
DPART
TXONLY
MINMAX
LPPART
D6
Symbol
DPART
CCLIM
OWCE
resv
Tw2
TX ONLY
D5
RESERVED FOR FUTURE USE Value set at logic one
CARRIER RECOVERY TIME
0 Tw2 set at 5 bits
1 Tw2 set at 3 bits
CONSECUTIVE COLLISION LIMIT
0 Consecutive collision limit set at 63 collisions
1 Consecutive collision limit set at 31 collisions
LOOPBACK PARTITION
0 Partitioning upon lack of loopback from transceivers is enabled
1 Partitioning upon lack of loopback from transceivers is disabled
OUT OF WINDOW COLLISION ENABLE
0 Out of window collisions are treated as in window collisions by the segment partition state
machines
1 Out of window collisions are treated as out of window collisions by the segment partition state
machines
ONLY RECONNECT UPON SEGMENT TRANSMISSION
0 A segment will only be reconnected to the network if a packet transmitted by the RIC onto that
segment fulfills the requirements of the segment reconnection algorithm
1 A segment will be reconnected to the network by any packet on the network which fullfills the
requirements of the segment reconnection algorithm
DISABLE PARTITION
0 Partitioning of ports by on-chip algorithms is prevented
1 Partitioning of ports by on-chip algorithms is enabled
MINIMUM MAXIMUM DISPLAY MODE
0 LED display set in minimum display mode
1 LED display set in maximum display mode
(Continued)
OWCE
D4
LPPART
D3
CCLIM
D2
59
Tw2
D1
Description
resv
D0