DP83950BNU NSC [National Semiconductor], DP83950BNU Datasheet - Page 57

• Manufacturer Part Number: DP83950BNU
• Manufacturer: NSC [National Semiconductor]

Bit
D0
D1
D2
D3
D4
D5
D6
D7
8 0 RIC Registers
RIC Status and Configuration Register (Address 00H)
The lower portion of this register contains real time information concerning the operation of the RIC The upper three bits
represent the chosen configuration of the transceiver interface employed
BINV
D7
R W
R
R
R
R
R
R
R
R
BYPAS2
D6
BYPAS1
BYPAS2
Symbol
Access
APART
AREC
ACOL
BINV
resv
JAB
BYPAS1
D5
RESERVED FOR FUTURE USE
Reads as a logic 0
ANY COLLISIONS
0 A collision is occurring at one or more of the RIC’s ports
1 No collisions
ANY RECEIVE
0 One of the RIC’s ports is the current packet or collision receiver
1 No packet or collision reception within this RIC
JABBER PROTECT
0 The RIC has been forced into jabber protect state by one of its ports or by another port on the
Inter-RIC bus (Multi-RIC operations)
1 No jabber protect conditions exist
ANY PARTITION
0 One or more ports are partitioned
1 No ports are partitioned
These bits define the configuration of ports 2 to 13 i e their use if the internal 10BASE-T
transceivers or the external (AUI-like) transceiver interface
BUS INVERT
This register bit informs whether the Inter-RIC signals IRE ACTN ANYXN COLN and Management
bus signal MCRS are active high or low
0 Active high
1 Active low
(Continued)
APART
D4
JAB
D3
AREC
D2
57
ACOL
D1
Description
resv
D0