LAN9313I SMSC [SMSC Corporation], LAN9313I Datasheet - Page 115

• Manufacturer Part Number: LAN9313I
• Description: Three Port 10/100 Managed Ethernet Switch with MII
• Manufacturer: SMSC [SMSC Corporation]

Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
SMSC LAN9313/LAN9313i
8.2.4.2
8.2.4.3
8.2.4.4
8.2.4.4.1
BYTE/BIT
Byte 10
Byte 11
Byte 8
Byte 9
EEPROM Valid Flag
Following the release of nRST, POR, DIGITAL_RST, or a RELOAD command, the EEPROM Loader
starts by reading the first byte of data from the EEPROM. If the value of A5h is not read from the first
byte, the EEPROM Loader will load the current configuration strap values into the PHY registers (see
Section
(E2P_CMD). Otherwise, the EEPROM Loader will continue reading sequential bytes from the
EEPROM.
MAC Address
The next six bytes in the EEPROM, after the EEPROM Valid Flag, are written into the
MAC Address High Register (SWITCH_MAC_ADDRH)
(SWITCH_MAC_ADDRL). The EEPROM bytes are written into the MAC address registers in the order
specified in
Soft-Straps
The 7
byte has a value of A5h, the next 4 bytes of data (8-11) are written into the configuration strap registers
per the assignments detailed in
(they are still read to maintain the data burst, but are discarded). However, the current configuration
strap values are still loaded into the PHY registers (see
"Configuration Straps," on page 45
straps.
Some PHY register defaults are based on configuration straps. In order to maintain consistency
between the updated configuration strap registers and the PHY registers, the
Negotiation Advertisement Register
(PHY_SPECIAL_MODES_x), and
written when the EEPROM Loader is run.
The
defaults as detailed in
(PHY_AN_ADV_x)," on page
The
as detailed in
page
The
as detailed in
page
negotiation using the new default values of the
(PHY_AN_ADV_x)
PHY REGISTERS SYNCHRONIZATION
BP_EN_
BP_EN_
strap_1
strap_2
Port x PHY Special Modes Register (PHY_SPECIAL_MODES_x)
Port x PHY Basic Control Register (PHY_BASIC_CONTROL_x)
LED_fun_strap[1:0]
Port x PHY Auto-Negotiation Advertisement Register (PHY_AN_ADV_x)
7
246.
233. Additionally, the Restart Auto-negotiation bit is set in this register. This re-runs the Auto-
th
8.2.4.4.1) and then terminate, clearing the EPC_BUSY bit in the
byte of data to be read from the EEPROM is the Configuration Strap Values Valid Flag. If this
Table
Section 13.2.2.9, "Port x PHY Special Modes Register (PHY_SPECIAL_MODES_x)," on
Section 13.2.2.1, "Port x PHY Basic Control Register (PHY_BASIC_CONTROL_x)," on
FD_FC_
FD_FC_
strap_1
strap_2
6
8.7.
register to determine the new Auto-negotiation results.
Table 8.8 EEPROM Configuration Bits
Section 13.2.2.5, "Port x PHY Auto-Negotiation Advertisement Register
FC_strap_1
FC_strap_2
strap_mii
manual_
manual_
BP_EN_
239.
5
Table
Port x PHY Basic Control Register (PHY_BASIC_CONTROL_x)
DATASHEET
for more information on the LAN9313/LAN9313i configuration
8.8. If the flag byte is not A5h, these next 4 bytes are skipped
manual_mdix
manual_mdix
(PHY_AN_ADV_x),
strap_mii
_strap_1
_strap_2
FD_FC_
115
4
LED_en_strap[7:0]
Port x PHY Auto-Negotiation Advertisement Register
auto_mdix_
auto_mdix_
manual_FC
_strap_mii
strap_1
strap_2
and
3
Section
Switch Fabric MAC Address Low Register
Port x PHY Special Modes Register
strap_mii
speed_
strap_1
speed_
strap_2
speed_
8.2.4.4.1). Refer to
2
is written with the new defaults
is written with the new defaults
EEPROM Command Register
duplex_pol_
strap_mii
is written with the new
duplex_
duplex_
strap_1
strap_2
Revision 1.2 (04-08-08)
1
Port x PHY Auto-
Section 4.2.4,
Switch Fabric
disable_strap
SQE_test_
autoneg_
autoneg_
strap_1
strap_2
_mii
0
are