LAN9313I SMSC [SMSC Corporation], LAN9313I Datasheet - Page 207

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LAN9313I

Manufacturer Part Number
LAN9313I
Description
Three Port 10/100 Managed Ethernet Switch with MII
Manufacturer
SMSC [SMSC Corporation]
Datasheet

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Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
SMSC LAN9313/LAN9313i
13.1.6
13.1.6.1
31:16
BITS
15:0
RESERVED
MII Data
This field contains the value read from or written to the PHYs. For a write
operation, this register should be first written with the desired data. For a
read operation, the PMI_ACCESS register is first written and once the
command is finished, this register will contain the return data.
Note:
PHY Management Interface (PMI)
The PMI registers are used to indirectly access the PHY registers. Refer to
PHY Control and Status Registers," on page 231
to
Note: The Virtual PHY registers are NOT accessible via these registers.
PHY Management Interface Data Register (PMI_DATA)
This register is used in conjunction with the
(PMI_ACCESS)
Note: The Virtual PHY registers are NOT accessible via these registers.
Section 9.3, "PHY Management Interface (PMI)," on page 127
Upon a read, the value returned depends on the MII Write bit
(MIIWnR) in the
(PMI_ACCESS). If MIIWnR is 0, the data is from the PHY. If
MIIWnR is 1, the data is the value that was last written into this
register.
Offset:
to perform read and write operations to the PHYs.
PHY Management Interface Access Register
0A4h
DESCRIPTION
DATASHEET
207
Size:
for additional information on the PHY registers. Refer
PHY Management Interface Access Register
32 bits
for information on the PMI.
TYPE
R/W
Section 13.2, "Ethernet
RO
Revision 1.2 (04-08-08)
00000000h
DEFAULT
-

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