LAN9313I SMSC [SMSC Corporation], LAN9313I Datasheet - Page 384

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LAN9313I

Manufacturer Part Number
LAN9313I
Description
Three Port 10/100 Managed Ethernet Switch with MII
Manufacturer
SMSC [SMSC Corporation]
Datasheet

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Revision 1.2 (04-08-08)
13.3.4.27
31:14
13:10
BITS
9:8
7
RESERVED
Drop Reason B
When bit 7 is set, these bits indicate the reason a packet was dropped per
the table below:
Source Port B
When bit 7 is set, these bits indicate the source port on which the packet
was dropped.
00 = Port 0
01 = Port 1
10 = Port 2
11 = RESERVED
Status B Pending
When set, bits 13:8 are valid.
VALUES
Buffer Manager Interrupt Pending Register (BM_IPR)
This register contains the Buffer Manager interrupt status. The status is double buffered. All interrupts
in this register may be masked via the
Refer to
0000
0001
0010
0100
0101
1000
1001
1010
0011
0110
0111
1011
1100
1101
1110
1111
BIT
Register #:
Chapter 5, "System Interrupts," on page 52
The destination address was not in the ALR table (unknown or broadcast), and
the Broadcast Buffer Level was exceeded.
Drop on Red was set and the packet was colored Red.
There were no buffers available.
There were no memory descriptors available.
The destination address was not in the ALR table (unknown or broadcast) and
there were no valid destination ports.
The packet had a receive error and was >64 bytes
The Buffer Drop Level was exceeded.
RESERVED
RESERVED
Drop on Yellow was set, the packet was colored Yellow and was randomly
selected to be dropped.
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
1C21h
DESCRIPTION
DESCRIPTION
DATASHEET
Buffer Manager Interrupt Mask Register (BM_IMR)
384
Size:
for more information.
Three Port 10/100 Managed Ethernet Switch with MII
32 bits
TYPE
SMSC LAN9313/LAN9313i
RO
RC
RC
RC
DEFAULT
00b
Datasheet
0h
0b
-
register.

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