STA333BW_11 STMICROELECTRONICS [STMicroelectronics], STA333BW_11 Datasheet - Page 15

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STA333BW_11

Manufacturer Part Number
STA333BW_11
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
STA333BW
3.6
Note:
Power-on/off sequence
Figure 4.
The definition of a stable clock is when f
Section
I
Figure 5.
2
S interface.
VCC
VCC
VDD_Dig
VDD_Dig
XTI
XTI
Soft Mute
Soft Mute
Reg. 0x07
Reg. 0x07
Data 0xFE
Data 0xFE
Soft EAPD
Soft EAPD
Reg. 0x05
Reg. 0x05
Bit 7 = 0
Bit 7 = 0
VCC
VCC
VCC
VCC
VCC
VDD_Dig
VDD_Dig
VDD_Dig
VDD_Dig
VDD_Dig
XTI
XTI
XTI
XTI
XTI
Reset
Reset
Reset
Reset
Reset
I
I
I
I
I
PWDN
PWDN
PWDN
PWDN
PWDN
2
2
2
2
2
TR = minimum time between XTI master clock stable and Reset removal: 1 ms
TC = minimum time between Reset removal and I
C
C
C
C
C
Serial audio input interface format on page 25
Power-on sequence
Power-off sequence for pop-free turn-off
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
Note: no specific VCC and
VDD_DIG turn
is required
Don’t care
Don’t care
Doc ID 13773 Rev 3
Don’t care
Don’t care
Don’t care
Don’t care
Don’t care
max
on sequence
TR
TR
TR
TR
TR
- f
2
C program, sequence start: 1ms
FE
FE
min
< 1 MHz.
gives information on setting up the
TC
TC
TC
TC
TC
Note: no specific VCC and
VDD_DIG turn
is required
Electrical specifications
CMD0
CMD0
CMD0
CMD0
CMD0
Don’t care
Don’t care
Don’t care
Don’t care
CMD1
CMD1
CMD1
CMD1
CMD1
Don’t care
Don’t care
Don’t care
Don’t care
off sequence
CMD2
CMD2
CMD2
CMD2
CMD2
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