STA333BW_11 STMICROELECTRONICS [STMicroelectronics], STA333BW_11 Datasheet - Page 61

• Manufacturer Part Number: STA333BW_11
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STA333BW
7
7.1
7.2
7.3
Applications
Applications schematic
Figure 20
has to be paid to the layout of the PCB. All the decoupling capacitors have to be placed as
close as possible to the device to limit spikes on all the supplies.
PLL filter circuit
It is recommended to use the above circuit and values for the PLL loop filter to achieve the
best performance from the device in general applications. Note that the ground of this filter
circuit has to be connected to the ground of the PLL without any resistive path. Concerning
the component values, it must be taken into account that the greater the filter bandwidth, the
less is the lock time but the higher is the PLL output jitter.
Typical output configuration
Figure 19
STMicroelectronics for other recommended output configurations.
Figure 19. Output configuration for stereo BTL mode (R
below shows the typical applications schematic for STA333BW. Special attention
shows the typical output configuration used for BTL stereo mode. Please contact
OUT2A
OUT2B
OUT1A
OUT1B
330 pF
330 pF
22R
22R
Doc ID 13773 Rev 3
22 µH
22 µH
22 µH
22 µH
100 nF
6R2
6R2
100 nF
100 nF
6R2
6R2
100 nF
100 nF
100 nF
100 nF
100 nF
470 nF
470 nF
L
= 8 Ω)
Left
Right
Applications
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