STA333BW_11 STMICROELECTRONICS [STMicroelectronics], STA333BW_11 Datasheet - Page 23

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STA333BW_11

Manufacturer Part Number
STA333BW_11
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
STA333BW
The external clock frequency provided to the XTI pin must be a multiple of the input sample
frequency (f
The relationship between the input clock and the input sample rate is determined by both
the MCSx and the IR (input rate) register bits. The MCSx bits determine the PLL factor
generating the internal clock and the IR bit determines the oversampling ratio used
internally.
Table 10.
Interpolation ratio select
Table 11.
The STA333BW has variable interpolation (oversampling) settings such that internal
processing and FFX output rates remain consistent. The first processing block interpolates
by either 2-times or 1-time (pass-through) or provides a 2-times downsample. The
oversampling ratio of this interpolation is determined by the IR bits.
Table 12.
32, 44.1, 48
88.2, 96
176.4, 192
4:3
32
44.1
48
88.2
96
176.4
192
Bit
Input sample rate
Input sample rate fs (kHz)
fs (kHz)
R/W
R/W
s
).
Input sampling rates
Internal interpolation ratio
IR bit settings as a function of input sample rate
00
RST
00
01
1X
IR [1:0]
IR
Name
Doc ID 13773 Rev 3
576 * fs
NA
NA
101
00
00
00
01
01
10
10
IR
Selects internal interpolation ratio based on input I
sample frequency
128 * fs
64 * fs
32 * fs
2-times oversampling
2-times oversampling
2-times oversampling
Pass-through
Pass-through
2-times downsampling
2-times downsampling
100
256 * fs
128 * fs
64 * fs
1st stage interpolation ratio
011
MCS[2:0]
Description
384 * fs
192 * fs
96 * fs
010
Register description
512 * fs
256 * fs
128 * fs
001
768 * fs
384 * fs
192 * fs
2
S
000
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