HMP8112CN HARRIS [Harris Corporation], HMP8112CN Datasheet
HMP8112CN
Related parts for HMP8112CN
HMP8112CN Summary of contents
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... The HMP8112 operates from a single 5V supply and is TTL/CMOS compatible. Ordering Information TEMP. o PART NUMBER RANGE ( C) PACKAGE HMP8112CN PQFP† HMP8112EVAL2 PCI Reference Design (Includes Part) HMP8156EVAL2 Frame Grabber Evaluation Board (Includes Part) † PQFP is also known as QFP and MQFP Table of Contents Functional Block Diagrams ...
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Functional Block Diagrams HMP8112 2 ...
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Functional Block Diagrams GAIN_CTRL CCLAMP_CAP EXTERNAL ANTIALIASING FILTER CIN3 LIN0 LIN1 LIN2 LCLAMP_CAP LAGC_CAP HMP8112 (Continued) CLAMP DIGITAL COMPARATOR LOGIC AND CLAMP GAIN CONTROL - + EXTERNAL ANTIALIASING FILTER SOURCE L_OUT L_ADIN SELECT INPUT + MUX - DIGITAL COMPARATORS SYNC ...
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Functional Block Diagrams HMP8112 (Continued) VIDEO DECODER 4 ...
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Functional Block Diagrams ADDRESS POINTER ADDRESS POINTER CONTROL DATA BUS SERIAL SHIFT REGISTER A0 SCL SDA CONTROL INTERFACE Schematic LUMA0 LUMA1 C5 1 LUMA2 1 LOW PASS FILTER ...
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Introduction The HMP8112 is an NTSC/PAL compatible Video Decoder with both chroma burst and line locked digital phase locked loops. The HMP8112 contains two 8-bit A/D converters and port for programming internal registers. Analog Video/Mux Inputs ...
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SC 0 HSYNC VIDEO INPUT DC RESTORE HAGC OVERLAPPED CONTROL FIGURE 2A. PLL ACQUISITION MODE The input sample rate converter will interpolate between existing CLK samples to create the ...
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PAL chrominance and luminance signals the user select- able filters should be enabled. The chroma notch filter built into the luminance channel should be enabled for PAL sys- tems to reduce ...
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TABLE 2. COMPATIBLE VIDEO INPUT STANDARDS COLOR SUBCARRIER STANDARD f SC NTSC M 3.579545MHz PAL 4.43361875MHz PAL M 3.579545MHz PAL N 4.43361875MHz Special 3.58205625MHz Combination PAL N VIDEO INPUT VSYNC DETECT LOW TIME THRESHOLD O ...
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Video Input Control register. The error flag is cleared after a RESET or after the ...
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The 2-bit values allow 4 choices of scaling factors. The sharpness control helps to compensate for losses in the scaling interpolators that can reduce the amplitude of high frequency components. TABLE 4. SHARPNESS GAIN FACTOR SELECTS XF1 XF0 GAIN FACTOR ...
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CLK frequency and Table 5 shows the number of data points per video line to expect for a given standard. Data is output as 4:2:2 subsampled data in a Y-Cb/Y-Cr 16-bit sequence. The Data Valid (DVLD) flag is asserted when ...
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Reset The RESET pin is used to return the decoder to an initializa- tion state. This pin should be used after a power-up to set the part into a known state. The internal registers are returned to their RESET state ...
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BIT NUMBER FUNCTION Video Input These bits select the video input standard. Standard 00 = PAL 4.43MHz subcarrier; 50fps; 625 lines/frame PAL M; 3.58MHz subcarrier; 60fps; 525 lines/frame ...
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TABLE 8. LUMINANCE CONTRAST ADJUST REGISTER BIT NUMBER FUNCTION Luminance Contrast This register sets the contrast adjust factor. This value is multiplied by the luminance data Adjust Factor and allows the data to be scaled from 0 ...
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TABLE 11. COLOR SATURATION ADJUST FACTOR BIT NUMBER FUNCTION Color Saturation This register sets the color saturation adjust factor. This value is multiplied by the chromi- Adjust Factor nance (CbCr) data and allows the data to be ...
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TABLE 15. HORIZONTAL AGC START TIME REGISTER (Continued) BIT NUMBER FUNCTION Horizontal AGC This register provides a programmable delay for the HAGC pulse that control the sync Pulse Programmable tip AGC in the A/D converters. The start ...
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TABLE 20. HORIZONTAL SYNC END TIME REGISTER BIT NUMBER FUNCTION Horizontal Drive This register provides a programmable delay for the external HDRIVE signal. The end Programmable End time of the HDRIVE pulse is set from the detection ...
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TABLE 25. DC RESTORE START TIME REGISTER BIT NUMBER FUNCTION Not Used Restore This register provides a programmable delay for the internal DC RES signal. The start Programmable Start time of the DC ...
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TABLE 28. OUTPUT FORMAT CONTROL REGISTER (Continued) BIT NUMBER FUNCTION 1 Vertical Pixel Siting When this bit is cleared (‘0’) the chrominance pixels have a 1/2 line pixel offset from their associated luminance pixel in a 4:2:2 subsampled scheme. When ...
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BIT NUMBER FUNCTION Reserved Read This register is reserved for future use. This register will read all zero’s and is write ig- Only nored. BIT NUMBER FUNCTION Product ID Code This register contains the ...
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Pin Description PQFP PIN INPUT/ NAME NUMBER OUTPUT LIN[0: Input CIN 19 Input WPE 27 Input GAIN_CTRL 28 Input DEC_T 78 Input DEC_L 30 Input LAGC_CAP 77 Input LCLAMP_CAP 76 Input CCLAMP_CAP 29 Input L_ADIN 8 Input ...
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Pin Description (Continued) PQFP PIN INPUT/ NAME NUMBER OUTPUT VSYNC 70 Output FIELD 67 Output ACTIVE 65 Output TEST 36 Input DV 26, 31,37, 44, Input CC 52, 59, 68, 75, 79 DGND 25, 32, 33, 35, Input 39, 46, ...
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... Input Logic High Voltage Input Logic Low Voltage Input Logic Current HMP8112 Thermal Information Thermal Resistance (Typical, See Note 1) 0.5V PQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . CC Maximum Power Dissipation HMP8112CN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.9W Maximum Storage Temperature Range . . . . . . . . . .-65 Maximum Junction Temperatures . . . . . . . . . . . . . . . . . . . . . 150 Maximum Lead Temperature (Soldering 10s 300 ...
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Electrical Specifications V = 5.0V PARAMETER Output Logic High Voltage Output Logic Low Voltage Output Logic Current Three-State Output Current Leakage DIGITAL I/O (SDA, SCL, Fast Mode) Input Logic High Voltage Input Logic Low Voltage ...
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Electrical Specifications V = 5.0V PARAMETER VIDEO PERFORMANCE Differential Gain Differential Phase Integral Linearity Differential Linearity SNR Luminance to Chrominance Crosstalk Chrominance to Luminance Crosstalk Horizontal Locking and Recovery Time # of Missing Horizontal Syncs Before Lost Lock ...
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Typical Performance Curves NTSC Composite Phase HMP8112 FIGURE 17. COLOR BARS NTSC 100% (EIA) FIGURE 18. COLOR BARS VECTORSCOPE 27 ...
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Typical Performance Curves NTSC Composite Phase (Continued) HMP8112 (Continued) FIGURE 19. COLOR BARS VM700 TEST FIGURE 20. DIFFERENTIAL PHASE AND GAIN 28 ...
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Typical Performance Curves NTSC Frequency Response FIGURE 22. MULTIBURST VM700 FREQUENCY ROLL-OFF TEST HMP8112 (Continued) FIGURE 21. MULTIBURST 29 ...
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Typical Performance Curves NTSC Noise Measurements FIGURE 23. SIGNAL TO NOISE RATIO - FLAT FREQUENCY RESPONSE FIGURE 24. SIGNAL TO NOISE RATIO - 5.0MHz LOW PASS FILTERED HMP8112 (Continued) 30 ...
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Typical Performance Curves NTSC Noise Measurements (Continued) FIGURE 25. SIGNAL TO NOISE RATIO - 4.2MHz LOW PASS FILTERED Pixel Jitter Test FIGURE 26. LONG TERM JITTER - 20 PULSE BAR 2T HMP8112 (Continued) 31 ...
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Typical Performance Curves PAL Composite Phase HMP8112 (Continued) FIGURE 27. COLOR BARS NTSC 100% (EIA) FIGURE 28. COLOR BARS VECTORSCOPE 32 ...
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Typical Performance Curves PAL Composite Phase (Continued) HMP8112 (Continued) FIGURE 29. COLOR BARS VM700 TEST FIGURE 30. DIFFERENTIAL PHASE AND GAIN 33 ...
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Typical Performance Curves PAL Frequency Response HMP8112 (Continued) FIGURE 31. MULTIBURST FIGURE 32. NTSC MULTI-TEST PATTERN 34 ...
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Typical Performance Curves FIGURE 33. NTSC CONVERGENCE TEST PATTERN HMP8112 (Continued) FIGURE 34. NTSC MULTIBURST TEST PATTERN 35 ...
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Typical Performance Curves FIGURE 35. NTSC SMPTE COLORBARS TEST PATTERN HMP8112 (Continued) FIGURE 36. PAL CONVERGENCE TEST PATTERN 36 ...
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Typical Performance Curves FIGURE 38. PAL SMPTE COLORBARS TEST PATTERN HMP8112 (Continued) FIGURE 37. PAL MULTIBURST TEST PATTERN 37 ...
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Typical Performance Curves 10 o TEMPERATURE = 2.6 2.8 3.0 3.2 3.4 3.6 GAIN CONTROL VOLTAGE FIGURE 39. CHROMINANCE AMPLIFIER GAIN vs GAIN CONTROL VOLTAGE Timing Waveforms ...
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PCB Layout Considerations A PCB board with a minimum of 4 layers is recommended, with layers 1 and 4 (top and bottom) for signals and layers 2 and 3 for power and ground. The PCB layout should implement the lowest ...
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Metric Plastic Quad Flatpack Packages (MQFP/PQFP -D- - PIN 1 - -16 0.40 0.20 0.016 MIN 0.008 o 0 MIN 0.13/0. 0.005/0.007 5 -16 L ...