HYB18H512321BF-08/10 QIMONDA [Qimonda AG], HYB18H512321BF-08/10 Datasheet - Page 10

• Manufacturer Part Number: HYB18H512321BF-08/10
• Description: 512-Mbit GDDR3 Graphics RAM
• Manufacturer: QIMONDA [Qimonda AG]

11) During Action ACTIVE an ACT command on another banks is allowed considering
12) During POWER DOWN and SELF REFRESH only the EXIT commands are allowed.
13) AUTO REFRESH starts with issuing the command and ends after
14) Actions MODE REGISTER SET and EXTENDED MODE REGISTER SET start with issuing the command and ends after
15) Action POWER DOWN EXIT starts with issuing the command and ends after t
16) Action SELF REFRESH EXIT starts with issuing the command and ends after
2.4
Notes
1. CKEn is the logic step at clock edge n; CKEn-1 was the state of CKE at the previous clock edge.
2. Current state is the state of the GDDR3 Graphics RAM immediately prior to clock edge n.
3. COMMAND is the command registered at clock edge n, and ACTION is a result of COMMAND.
4. All states and sequences not shown are illegal or reserved.
5. DESEL or NOP commands should be issued on any clock edges occurring during the
Rev. 1.1, 2007-09
05292007-WAU2-UU95
CKE
N-1
L
L
H
time. WR, WR/A, RD and RD/A are always allowed.
cycles is required before applying any other valid command.
CKE
n
L
H
L
CURRENT STATE
Power Down
Self Refresh
Power Down
Self Refresh
All Banks Idle
Bank(s) Active
All Banks Idle
Function Truth Table for CKE
COMMAND
X
X
DESEL or NOP
DESEL or NOP
DESEL or NOP
DESEL or NOP
Auto Refresh
10
t
RFC
.
XPN
t
XSC
.
t
.
RRD
ACTION
Stay in Power Down
Stay in Self Refresh
Exit Power Down
Exit Self Refresh
Entry Precharge Power Down
Entry Active Power Down
Entry Self Refresh
. A PRE command on another bank is allowed any
Function Truth Table II (CKE Table)
t
XSR
period. A minimum of 1000 clock
5
Internet Data Sheet
HYB18H512321BF
512-Mbit GDDR3
TABLE 5
t
MRD
.