HYB18H512321BF-08/10 QIMONDA [Qimonda AG], HYB18H512321BF-08/10 Datasheet - Page 15
HYB18H512321BF-08/10
Manufacturer Part Number
HYB18H512321BF-08/10
Description
512-Mbit GDDR3 Graphics RAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1.HYB18H512321BF-0810.pdf
(43 pages)
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4.1.1
Read and Write accesses to the GDDR3 Graphics RAM are burst oriented with burst length of 4 and 8. This value must be
programmed using the Mode Register Set command (A0 .. A2). The burst length determines the number of column locations
that can be accessed for a given READ or WRITE command.
When a READ or WRITE command is issued, a block of columns equal to the burst length is effectively selected. All accesses
for that burst take place within this block if a boundary is reached. The starting location within this block is determined by the
Rev. 1.1, 2007-09
05292007-WAU2-UU95
CLK#
Com.
CLK
PA
Burst length
NOP
t
RP
MRS
NOP
15
t
MRD
Mode Register Bitmap for High-Speed Application
NOP
t
MRDR
A.C.
MRS: MRS command
PA:
A.C.: Any other command as READ
RD:
Don't Care
READ command
PREALL command
Mode Register Set Timing
NOP
Internet Data Sheet
HYB18H512321BF
512-Mbit GDDR3
RD
FIGURE 4
FIGURE 5
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