RG82845M Intel, RG82845M Datasheet - Page 59

• Manufacturer Part Number: RG82845M
• Description: Chipset Memory Controller Hub Mobile
• Manufacturer: Intel

3.7.16.
250687-002
Note: Must contain default value of 00h
R
7
Rsv
Offset:
7
R
7
R
7
R
DRA[0:7] – DRAM Row Attribute Registers – Device #0
Default:
Access:
Size:
The DRAM Row Attribute Register defines the page sizes to be used when accessing different pairs of
rows. Each nibble of information in the DRA registers describes the page size of a pair of rows:
Row0, 1: 70h
Row2, 3: 71h
Row4, 5: 72h (Not Used; see note)
Row6, 7: 73h (Not Used; see note)
6:4
2:0
Bit
6
Row attribute for Row7
6
6
6
7
3
Row attribute for Row1
Row attribute for Row3
Row attribute for Row5
4
Reserved
Row Attribute for odd-numbered row: This 3-bit field defines the page size of the corresponding
row.
001: 2 KB
010: 4 KB
011: 8 KB
100: 16 KB
Others: Reserved
Reserved
Row Attribute for even-numbered row: This 3-bit field defines the page size of the corresponding
row.
001: 2 KB
010: 4 KB
011: 8 KB
100: 16 KB
Others: Reserved
70-73h
00h
Read/Write
8 bits
Datasheet
4
Intel
4
4
4
3
Rsv Row Attribute for Row6
®
3
R
3
R
3
R
Description
2
82845MP/82845MZ Chipset-Mobile (MCH-M)
2
2
2
Row Attribute for Row0
Row Attribute for Row2
Row Attribute for Row4
0
59
0
0
0