SCD1283 INTEL [Intel Corporation], SCD1283 Datasheet - Page 26

no-image

SCD1283

Manufacturer Part Number
SCD1283
Description
IEEE 1284-Compatible Parallel Interface
Manufacturer
INTEL [Intel Corporation]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SCD128310QCE
Manufacturer:
NS/国半
Quantity:
20 000
CD1283 — IEEE 1284-Compatible Parallel Interface
5.2.7
26
ADDRESS
DECODE
Figure 4. CD1283 Daisy-Chain Configuration
LOGIC
Daisy-Chain Configurations
Multiple CD1283s can be connected in a daisy-chain configuration, forming systems with multiple
parallel ports. The device provides all signals necessary for this configuration, with only minimal
external logic being
When the CPU acknowledges the request, both CD1283s receive the acknowledge through
SVCACK*. However, only the device receives DGRANT*. If it has an active request of this type
pending, it takes the acknowledge and drives the vector register (RIVR, TIVR, MIVR) onto the
data bus.
If the first device does not have a request pending, it passes DGRANT* to the second CD1283
through DPASS*. Assuming that the second CD1283 has an active request pending, it then takes
the acknowledge and drives its vector register onto the data bus.
4. If SVCREQP* and DMAREQ* are logically OR’ed together, the service routine must start by
5. SVCACKP* must not be activated in response to DMAREQ*; likewise, DMAACK* must not
6. The DMAdir bit (PFCR[5]) can determine whether to write or read to/from the DMABUF
7. The PFQR can determine how many reads of the 16-bit DMABUF register are necessary to
Section
(PFCR[6]) at the start of the interrupt service routine and setting it again at the end.
checking the SVRR to determine which signal is active.
be activated in response to SVCREQ*.
register.
empty the pipeline. Note however, four must be added to the PFQR value, then that number
then must be divided by two and truncated to the nearest integer (this accounts for the extra
four bytes in the two holding registers and the 16-bit DMABUF register, as well as 16-bit
instead of 8-bit reads).
5.2.4). However, the software can easily change this by clearing the DMAen bit
(Figure
4).
SVCACKP*
DGRANT*
CD1283
SVCREQP*
DPASS*
SVCACKP*
DGRANT*
CD1283
SVCREQP*
DPASS*
Datasheet
C Y C L E
ERROR

Related parts for SCD1283