LC89075W-H SANYO [Sanyo Semicon Device], LC89075W-H Datasheet - Page 14

• Manufacturer Part Number: LC89075W-H
• Description: Digital Audio Interface Receiver with Stereo ADC and Audio Selector
• Manufacturer: SANYO [Sanyo Semicon Device]

8. System Settings (Common to ADC, DIR, and Audio selector)
8.1 Oscillation Amplifier Pin Settings (XIN, XOUT, XMCK)
• The LC89075W-H features a built-in oscillation amplifier. Connect a quartz resonator, feedback resistor, and load
• If the built-in oscillation amplifier is not used and an oscillation module is used as the clock source instead, connect
• Always supply a 12.288MHz or 24.576MHz clock to XIN.
• The clock frequency is set with the XINSEL[1:0] register. The clock frequency set with the XINSEL[1:0] register and
• The clock set with the XINSEL[1:0] register is defined as the ADC operation clock and the MCKOUT, BCKOUT,
• XMCK outputs the XIN clock. The XMCK output is set with the XMSEL[1:0] register. 1/1, 1/2 or 1/4 of the XIN
8.2 ADC Common Voltage Output Pin Setting (VREF)
• VREF is used as the ADC analog signal common
• Connect 10μF and 0.1μF capacitors between VREF and
8.3 DIR Loop Filter Pin Setting (LPF)
• The DIR incorporates a VCO (Voltage Controlled Oscillator)
• The PLL is locked at 512fs.
• LPF is a pin for the PLL loop filter. Connect the resistor and
capacitance to XIN and XOUT to configure an oscillation circuit. The figure below shows the connection diagram.
When connecting a quartz resonator, use one with a fundamental wave, and be aware that the load capacitance
depends on the quartz resonator characteristics, so thorough investigation should be made.
the output of an external clock supply source to XIN. At this time, it is not necessary to connect a feedback resistor
between XIN and XOUT.
the clock frequency input to XIN must match.
and LRCKOUT output clocks when ADC data output is selected. Complete the XINSEL[1:0] register setting prior to
bi-phase data input.
clock, or “L” output can be set.
AGND, as close to the pins as possible. In addition, do not
position clock or digital signal wiring close to these
capacitors to avoid coupling to the converter.
that synchronizes with sampling frequencies from 32kHz to
192kHz and with the data with a transfer rate from 4MHz to 25MHz.
voltage and outputs the 1/2AV DD voltage.
capacitors shown in the right figure, as close to the pin as possible.
(a) XIN/XOUT Quartz Resonator Connection Diagram
XMCK
30
220 to 2k Ω
1p to 33pF
XOUT
Figure 8.1 XIN/XOUT External Circuit Connection Diagram
31
12.288MHz
24.576MHz
1M Ω
XIN
32
LC89075W-H
1p to 33pF
Figure 8.2 VREF External Circuit Connection Diagram
Figure 8.3 LPF External Circuit Connection Diagram
XMCK
30
(b) XIN External Clock Input Diagram
0.068μF
PGND
VREF
XOUT
Open
48
31
2
AGND
LPF
12.288MHz
24.576MHz
47
1
0.1μF
10μF
0.001μF
100Ω
XIN
32
No.A1858-14/69