LC89075W-H SANYO [Sanyo Semicon Device], LC89075W-H Datasheet - Page 49

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LC89075W-H

Manufacturer Part Number
LC89075W-H
Description
Digital Audio Interface Receiver with Stereo ADC and Audio Selector
Manufacturer
SANYO [Sanyo Semicon Device]
Datasheet
• Switching to the MPIO[4:1] input setting (“MPSEL[1:0]=01”) must be performed from the MPIO[4:1] high
• MPSTA[1:0] can be set only when “MPSEL[1:0]=00” is set.
Register name
Initial value
Setting
impedance output status.
MPSEL[1:0]
MPSTA[1:0]
PI0
PI1
PI2
PI3
03h
MPIO[4:1] pin I/O setting
MPIO[4:1] pin output setting when “MPSEL[1:0]=00” is set
MPIO1 output setting when “MPSEL[1:0]=00” and “MPSTA[1:0]=10”
MPIO2 output setting when “MPSEL[1:0]=00” and “MPSTA[1:0]=10”
MPIO3 output setting when “MPSEL[1:0]=00” and “MPSTA[1:0]=10”
MPIO4 output setting when “MPSEL[1:0]=00” and “MPSTA[1:0]=10”
R/W
PI3
D7
0
00: All of the MPIO[4:1] pins are subject to the MPSTA[1:0] register setting (initial value).
01: All MPIO[4:1] pins are input.
10: ADC slave mode 512fs clock input (See 9.2.3, "Slave mode.")
11: ADC slave mode 256fs clock input (See 9.2.3, "Slave mode.")
00: MPIO1: Hi-Z output (initial value)
01: MPIO1: Channel status, bit 1 output
10: MPIO1: PI0 output
11: MPIO1: “L” output
0: “L” output (initial value)
1: “H” output
0: “L” output (initial value)
1: “H” output
0: “L” output (initial value)
1: “H” output
0: “L” output (initial value)
1: “H” output
MPIO2: Hi-Z output
MPIO3: Hi-Z output
MPIO4: Hi-Z output
MPIO2: Channel status, copy bit output
MPIO3: Channel status, pre-emphasis information output
MPIO4: Channel status, L-bit output
MPIO2: PI1 output
MPIO3: PI2 output
MPIO4: PI3 output
MPIO2: “L” output
MPIO3: “L” output
MPIO4: “L” output
R/W
Address: 03h; System Setting (I/O Pin Setting 2)
PI2
D6
0
R/W
PI1
D5
0
LC89075W-H
R/W
PI0
D4
0
MPSTA1
R/W
D3
0
MPSTA0
R/W
D2
0
MPSEL1
R/W
D1
0
No.A1858-49/69
MPSEL0
R/W
D0
0

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