MAX11339ATJ+ Maxim Integrated, MAX11339ATJ+ Datasheet - Page 16

• Manufacturer Part Number: MAX11339ATJ+
• Description: Analog to Digital Converters - ADC 10-Bit 8Ch 500ksps SAR ADC
• Manufacturer: Maxim Integrated

Specifications of MAX11339ATJ+

• Rohs: yes
• Number Of Channels: 8
• Architecture: SAR
• Conversion Rate: 500 kSPs
• Resolution: 10 bit
• Input Type: Single-Ended/Differential
• Snr: 61.5 dB
• Interface Type: 3-Wire Serial, Microwire, QSPI, SPI
• Operating Supply Voltage: 3 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TQFN-EP-32
• Maximum Power Dissipation: 2758 mW
• Minimum Operating Temperature: - 40 C
• Voltage Reference: 2.35 V to 3.6 V

Figure 2c. External Clock Mode Timing Diagram with CHAN_ID=0
The MAX11335–MAX11340 include up to 16 analog input
channels that can be configured on a pin-by-pin basis
to 16 single-ended inputs, 8 fully differential pairs, or 15
pseudo-differential inputs with respect to one common
input (REF-/AIN15 is the common input).
The analog input range is 0V to V
and pseudo-differential mode (unipolar) and QV
QV
the RANGE register settings. See
register settings.
Unipolar mode sets the differential input range from 0
to V
negative analog input in unipolar mode, the digital output
code is zero. Selecting bipolar mode sets the differential
input range to QV
RANGE register settings
In single-ended mode, the ADC always operates in uni-
polar mode. The analog inputs are internally referenced
to GND with a full-scale input range from 0V to V
Single-ended conversions are internally referenced to
GND
The MAX11335–MAX11340 feature up to 15 pseudo
differential inputs by setting the PDIFF_COM bits in the
Unipolar register to 1
nals inputs are referenced to a DC signal applied to the
REF-/AIN15.
When the reference is used in fully differential mode
(REFSEL = 1), the full-scale range is set by the difference
between REF+ and REF-. The output code reaches its
Maxim Integrated
DOUT
SCLK
REF+
DIN
REF+
CS
Fully Differential Reference (REF+, REF-)
(Figure
in fully differential mode (bipolar) depending on
. If the positive analog input swings below the
500ksps, 12-/10-Bit, 4-/8-/16-Channel ADCs with
Post-Mux External Signal Conditioning Access
3).
1
DI[15]
0
REF+
and Pseudo-Differential Input
2
(Table
MSB] MSB-1 MSB-2
DI[14]
Single-Ended, Differential,
/2 or QV
(Table
3
10). The 15 analog input sig-
4
REF+
7).
Table 7
REF+
5
depending on the
in single-ended
6
for the RANGE
7
REF+
8
REF+
/2 or
9
.
10
Figure 3. Equivalent Input Circuit
maximum value if the input signal exceeds this reference
range.
The output format of the MAX11335–MAX11340 is straight
binary in unipolar mode and two’s complement in bipolar
mode. The code transitions midway between successive
integer LSB values, such as 0.5 LSB, 1.5 LSB.
4
function, respectively. Output coding is binary, with for
example, 1 LSB = V
as the MAX11335/MAX11336/MAX11337.
The MAX11335–MAX11340 contain a FIFO buffer that can
hold up to 16 ADC results. This allows the ADC to handle
multiple internally clocked conversions without tying up
the serial bus. If the FIFO is filled and further conversions
are requested without reading from the FIFO, the oldest
ADC results are overwritten by the new ADC results. Each
and
11
MAX11335–MAX11340
Figure 5
12
(GND)
AIN
AIP
13
LSB
HOLD
show the unipolar and bipolar transfer
14
REF+
0
15
/4096 in the 12-bit devices such
DI[1]
ADC Transfer Function
16
DAC
DAC
DI[0]
COMPARATOR
Internal FIFO
Figure
16