MAX11339ATJ+ Maxim Integrated, MAX11339ATJ+ Datasheet - Page 6

• Manufacturer Part Number: MAX11339ATJ+
• Description: Analog to Digital Converters - ADC 10-Bit 8Ch 500ksps SAR ADC
• Manufacturer: Maxim Integrated

Specifications of MAX11339ATJ+

• Rohs: yes
• Number Of Channels: 8
• Architecture: SAR
• Conversion Rate: 500 kSPs
• Resolution: 10 bit
• Input Type: Single-Ended/Differential
• Snr: 61.5 dB
• Interface Type: 3-Wire Serial, Microwire, QSPI, SPI
• Operating Supply Voltage: 3 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TQFN-EP-32
• Maximum Power Dissipation: 2758 mW
• Minimum Operating Temperature: - 40 C
• Voltage Reference: 2.35 V to 3.6 V

ELECTRICAL CHARACTERISTICS (MAX11338/MAX11339/MAX11340) (continued)
(V
unless otherwise noted. Typical values are at T
Maxim Integrated
Crosstalk
CONVERSION RATE
Power-Up Time
Acquisition Time
Conversion Time
External Clock Frequency
Aperture Delay
Aperture Jitter
ANALOG INPUT
Input Voltage Range
Absolute Input Voltage Range
Static Input Leakage Current
Input Capacitance
EXTERNAL REFERENCE INPUT
REF- Input Voltage Range
REF+ Input Voltage Range
REF+ Input Current
DIGITAL INPUTS (SCLK, DIN, CS, CNVST)
Input Voltage Low
Input Voltage High
DD
= 2.35V to 3.6V, V
PARAMETER
500ksps, 12-/10-Bit, 4-/8-/16-Channel ADCs with
Post-Mux External Signal Conditioning Access
OVDD
= 1.5V to 3.6V, f
SYMBOL
t
V
f
V
I
CONV
C
t
V
SCLK
REF+
ACQ
I
REF+
t
V
REF-
V
ILA
PU
INA
AIN
IH
IL
SAMPLE
A
-0.5dB below full-scale of 99.2432kHz
sine-wave input to the channel being
sampled; apply full-scale 69.2139kHz sine
wave signal to all 15 nonselected
input channels
Conversion cycle, external clock
Internally clocked (Note 8)
Externally clocked, f
16 cycles (Note 8)
RMS
Unipolar (single-ended and pseudo
differential)
Bipolar (Note 9)
AIN+, AIN- relative to GND
V
During acquisition time,
RANGE bit = 0 (Note 10)
During acquisition time,
RANGE bit = 1 (Note 10)
V
V
= +25NC.) (Note 2)
AIN_
REF+
REF+
= 500ksps, f
= V
= 2.5V, f
= 2.5V, f
DD
, GND
SAMPLE
SAMPLE
CONDITIONS
SCLK
RANGE bit set to 0
RANGE bit set to 1
SCLK
= 8MHz, 50% duty cycle, V
= 500ksps
= 0Msps
= 8MHz,
MAX11335–MAX11340
-V
-V
V
O 0.75
2000
MIN
0.16
OVDD
-0.1
-0.3
REF+
REF+
REF+
/2
0
1
= V
TYP
-0.1
36.7
DD
312
-88
5.9
7.5
0.1
30
15
8
, T
A
= -40NC to +125NC,
+V
+V
+50mV
V
V
V
O 0.25
+ 0.1
MAX
±1.5
V
OVDD
REF+
REF+
+1
REF+
REF+
/2
DD
2
8
Cycles
UNITS
MHz
dB
ps
FA
pF
FA
FA
ns
µs
ns
ns
V
V
V
V
V
V
6