MAX11339ATJ+ Maxim Integrated, MAX11339ATJ+ Datasheet - Page 8

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MAX11339ATJ+

Manufacturer Part Number
MAX11339ATJ+
Description
Analog to Digital Converters - ADC 10-Bit 8Ch 500ksps SAR ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX11339ATJ+

Rohs
yes
Number Of Channels
8
Architecture
SAR
Conversion Rate
500 kSPs
Resolution
10 bit
Input Type
Single-Ended/Differential
Snr
61.5 dB
Interface Type
3-Wire Serial, Microwire, QSPI, SPI
Operating Supply Voltage
3 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
TQFN-EP-32
Maximum Power Dissipation
2758 mW
Minimum Operating Temperature
- 40 C
Voltage Reference
2.35 V to 3.6 V
ELECTRICAL CHARACTERISTICS (MAX11338/MAX11339/MAX11340) (continued)
(V
unless otherwise noted. Typical values are at T
Note 2: Limits are 100% production tested at T
Note 3: Channel ID disabled.
Note 4: Tested in single-ended mode.
Note 5: Offset nulled.
Note 6: Line rejection D(D
Note 7: Tested and guaranteed with fully differential input.
Note 8: Conversion time is defined as the number of clock cycles multiplied by the clock period with a 50% duty cycle.
Note 9: The operational input voltage range for each individual input of a differentially configured pair is from V
Note 10: See
Note 11: Guaranteed by characterization.
Figure 1. Detailed Serial-Interface Timing Diagram
Maxim Integrated
SCLK Rise to DIN Hold
CS Fall to SCLK Fall Setup
SCLK Fall to CS Fall Hold
CNVST Pulse Width
CS or CNVST Rise to EOC Low
(Note 7)
CS Pulse Width
DD
DOUT
SCLK
DIN
CS
= 2.35V to 3.6V, V
Parts are tested with MUX externally connected to the ADC input.
Maximum conversion time: 4.73Fs + N x 16 x t
t
operational input voltage difference is from -V
OSC_MAX
PARAMETER
500ksps, 12-/10-Bit, 4-/8-/16-Channel ADCs with
Post-Mux External Signal Conditioning Access
Figure 3
t
CSS
= 88.2ns, t
t
CLOCK
DOE
1ST
OVDD
(Equivalent Input Circuit).
t
DS
OUT
= 1.5V to 3.6V, f
OSC_TYP
) with V
t
DH
SYMBOL
t
CNV_INT
t
DD
t
CSBW
t
t
CSW
t
CSS
CSH
= 75ns.
DH
= 2.35V to 3.6V and V
SAMPLE
t
A
CH
A
See Figure 6
See Figure 7, f
= +25NC.) (Note 2)
= +25NC. Limits over the operating temperature range are guaranteed by design.
= 500ksps, f
REF+
OSC_MAX
/2 to +V
SAMPLE
CONDITIONS
REF+
SCLK
REF+
= 2.35V.
= 8MHz, 50% duty cycle, V
= 500ksps
/2 or -V
t
CP
t
MAX11335–MAX11340
DOT
REF+
to +V
REF+
CLOCK
16TH
t
CSH
.
t
MIN
CSBW
REF+
1
4
1
5
5
= V
TYP
DD
t
5.3
DOD
, T
A
DD
= -40NC to +125NC,
MAX
6.2
to GND. The
UNITS
ns
ns
ns
ns
Fs
ns
8

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