MAX1302AEUG+ Maxim Integrated, MAX1302AEUG+ Datasheet
MAX1302AEUG+
Specifications of MAX1302AEUG+
Related parts for MAX1302AEUG+
MAX1302AEUG+ Summary of contents
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... REF o 115ksps Maximum Sample Rate ). o Single +5V Power Supply o 24-Pin TSSOP Package PART MAX1302AEUG+ Applications MAX1302BEUG+ Note: All devices are specified over the -40°C to +85°C oper- ating temperature range. + Denotes a lead(Pb)-free/RoHS-compliant package. TOP VIEW Multirange Inputs, Serial 16-Bit ADC ...
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REF Serial 16-Bit ADC ABSOLUTE MAXIMUM RATINGS AVDD1 to AGND1 ....................................................-0.3V to +6V AVDD2 to AGND2 ....................................................-0.3V to +6V DVDD to DGND ........................................................-0.3V to +6V DVDDO to DGNDO ..................................................-0.3V to +6V DVDD to DVDDO......................................................-0.3V to +6V DVDD, DVDDO ...
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ELECTRICAL CHARACTERISTICS (continued AVDD1 AVDD2 DVDD DVDDO cycle), external clock mode 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input REF range (± 50pF, ...
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REF Serial 16-Bit ADC ELECTRICAL CHARACTERISTICS (continued AVDD1 AVDD2 DVDD DVDDO cycle), external clock mode 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input REF range (±V ...
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ELECTRICAL CHARACTERISTICS (continued AVDD1 AVDD2 DVDD DVDDO cycle), external clock mode 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input REF range (± 50pF, ...
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REF Serial 16-Bit ADC ELECTRICAL CHARACTERISTICS (continued AVDD1 AVDD2 DVDD DVDDO cycle), external clock mode 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input REF range (±V ...
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AVDD1 AVDD2 DVDD DVDDO cycle), external clock mode 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input REF range (± 50pF, C REF DOUT ...
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REF Serial 16-Bit ADC ( 5V, V AVDD1 AVDD2 DVDD DVDDO cycle), external clock mode 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input REF range (±V ...
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AVDD1 AVDD2 DVDD DVDDO cycle), external clock mode 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input REF range (± 50pF, C REF DOUT ...
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REF Serial 16-Bit ADC ( 5V, V AVDD1 AVDD2 DVDD DVDDO cycle), external clock mode 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input REF range (±V ...
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AVDD1 AVDD2 DVDD DVDDO cycle), external clock mode 4.096V (external reference operation), REFCAP = AVDD1, maximum single-ended bipolar input REF range (± 50pF, C REF DOUT ...
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REF Serial 16-Bit ADC PIN NAME Analog Supply Voltage 1. Connect AVDD1 to a +4.75V to +5.25V power-supply voltage. Bypass AVDD1 1 AVDD1 to AGND1 with a 0.1µF capacitor. 2 CH0 Analog Input Channel 0 3 CH1 Analog ...
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PIN NAME Analog Signal Ground 3. AGND3 is the ADC negative reference potential. Connect AGND3 to AGND1. 21 AGND3 DGND, DGNDO, AGND3, AGND2, and AGND1 must be connected together. Analog Supply Voltage 2. Connect AVDD2 to a +4.75V ...
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REF Serial 16-Bit ADC To maintain a low-noise environment, the MAX1302 provides separate power supplies for each section of circuitry. Table 1 shows the four separate power sup- plies. Achieve optimal performance using separate AVDD1, AVDD2, DVDD, and ...
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CS SCLK BYTE 1 SSTRB DIN ANALOG INPUT TRACK AND HOLD* HOLD HIGH DOUT IMPEDANCE *TRACK AND HOLD TIMING IS CONTROLLED BY SCLK. Figure 2. External Clock-Mode Conversion (Mode 0) As ...
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REF Serial 16-Bit ADC CS SSTRB SCLK BYTE 1 DIN DOUT t ANALOG INPUT TRACK AND HOLD* HOLD TRACK INTCLK** *TRACK AND HOLD TIMING IS CONTROLLED BY SCLK. **INTCLK IS ...
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CS SSTRB SCLK BYTE 1 DIN DOUT ANALOG INPUT TRACK AND HOLD* HOLD INTCLK** *TRACK AND HOLD TIMING IS CONTROLLED BY INTCLK, AND IS NOT ACCESSIBLE TO THE USER. **INTCLK ...
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REF Serial 16-Bit ADC Table 3. Input Data Word Formats OPERATION Conversion-Start Byte (Tables 4 and 5) Analog-Input Configuration Byte (Table 2) Mode-Control Byte (Table 7) Table 4. Channel Selection in Single-Ended Mode (DIF/SGL = 0) CHANNEL-SELECT BIT ...
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REF + REF +V /2 REF +V /4 REF REF -V /2 REF - REF -V REF INPUT RANGE SELECTION BITS, R[2:0] EACH INPUT IS FAULT TOLERANT TO ...
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REF Serial 16-Bit ADC Table 6. Range-Select Bits DIF/SGL ...
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INPUT VOLTAGE (V) Figure 9. Common-Mode Voltage vs. Input Voltage (FSR = INPUT ...
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REF Serial 16-Bit ADC FSR FFFF FFFE FFFD 8001 8000 7FFF 0003 0002 1 LSB = 0001 0000 -32,768 -32,766 - AGND1 (DIF/SGL = 0) 0V (DIF/SGL = 1) INPUT VOLTAGE (LSB [DECIMAL]) Figure 12. Ideal ...
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CSS SCLK DIN START SEL2 SEL1 SEL0 ANALOG INPUT CONFIGURATION BYTE t DV HIGH DOUT IMPEDANCE Figure 15. Analog Input Configuration Byte and Mode-Control Byte Timing SSTRB t SSCS CS ...
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REF Serial 16-Bit ADC Table 8. Mode-Control Bits M[2: External Acquisition ...
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External-acquisition-mode control byte • Internal-clock-mode control byte • Reset byte • Partial power-down-mode control byte This prevents the MAX1302 from inadvertently exiting full power-down mode because glitch in a noisy digital environment. The MAX1302 ...
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REF Serial 16-Bit ADC 4.096V SAR ADC REF MAX1302 5kΩ 4.096V BANDGAP REFERENCE Figure 18. External Reference Operation Bridge Application The MAX1302 converts 1kHz signals more accurately than a similar sigma-delta converter that might be con- sidered in ...
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INPUT 200Ω 4–20mA INPUT 200Ω Figure 19. 4–20mA Application BRIDGE Figure 20. Bridge Application Differential Nonlinearity (DNL) DNL is the difference between an actual step width and the ideal value of 1 LSB. A DNL error specification ...
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REF Serial 16-Bit ADC Unipolar Offset Error When a zero-scale analog input voltage is applied to the converter inputs, the digital output is all ones (0xFFFF). Ideally, the transition from 0xFFFF to 0xFFFE occurs at AGND1 - 0.5 ...
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Effective Number of Bits (ENOB) ENOB indicates the global accuracy of an ADC at a specific input frequency and sampling rate. With an input range equal to the ADC’s full-scale range, calcu- late the ENOB as follows: ⎛ ...
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REF Serial 16-Bit ADC CH0 CH1 CH2 ANALOG CH3 INPUT MUX CH4 AND CH5 MULTIRANGE CH6 CIRCUITRY CH7 AGND1 4.096V BANDGAP REFERENCE REFCAP REF Chip Information PROCESS: BiCMOS 30 ______________________________________________________________________________________ Multirange Inputs, CONTROL LOGIC AND REGISTERS AVDD2 CLOCK ...
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... Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. 31 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2012 Maxim Integrated Products ...