CDB5378 Cirrus Logic Inc, CDB5378 Datasheet - Page 3

• Manufacturer Part Number: CDB5378
• Description: EVALUATION BOARD FOR CS5378
• Manufacturer: Cirrus Logic Inc

Specifications of CDB5378

• Main Purpose: Seismic Evaluation System
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: CS3301A, CS5373A, CS5378
• Primary Attributes: Single Digital Filter
• Secondary Attributes: Graphical User Interface, SPI™ & USB Interfaces
• Processor To Be Evaluated: CS5378
• Interface Type: USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

LIST OF FIGURES
LIST OF TABLES
DS703F2
8. VOLTAGE REFERENCE ........................................................................................................ 31
9. POWER SUPPLIES ................................................................................................................ 33
10. TERMINOLOGY ................................................................................................................... 35
11. PIN DESCRIPTION ............................................................................................................... 36
12. PACKAGE DIMENSIONS .................................................................................................... 38
13. ORDERING INFORMATION ............................................................................................... 39
14. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION .......................... 39
15. REVISION HISTORY ........................................................................................................... 39
Figure 1. Modulator Noise Performance ......................................................................................... 9
Figure 2. Modulator + Test DAC Dynamic Performance................................................................. 9
Figure 3. Digital Input Rise and Fall Times ................................................................................... 15
Figure 4. System Timing Diagram................................................................................................. 17
Figure 5. MCLK / MSYNC Timing Detail ....................................................................................... 17
Figure 6. CS5373A Block Diagram ............................................................................................... 19
Figure 8. Connection Diagram ...................................................................................................... 20
Figure 7. System Diagram ............................................................................................................ 20
Figure 9. Power Mode Diagram .................................................................................................... 21
Figure 10. AC Differential Modes .................................................................................................. 23
Figure 11. AC Common Mode ...................................................................................................... 24
Figure 12. DC Test Modes ............................................................................................................ 25
Figure 13. Digital Signals .............................................................................................................. 26
Figure 14. Analog Signals ............................................................................................................. 28
Figure 15. DAC Output Attenuation Settings ................................................................................ 29
Figure 16. Voltage Reference Circuit ............................................................................................ 31
Figure 17. Power Supply Diagram ................................................................................................ 33
Table 1. Selections for Operational Mode and DAC Attenuation .................................................... 4
Table 2. Operational Modes.......................................................................................................... 22
Table 3. Output Coding for the CS5373A Modulator and CS5378 Digital Filter Combination ...... 22
7.5 DAC CAP± Connection ................................................................................................... 30
7.6 Analog Differential Signals .............................................................................................. 30
8.1 VREF Power Supply ........................................................................................................ 31
8.2 VREF RC Filter ................................................................................................................ 31
8.3 VREF PCB Routing ......................................................................................................... 31
8.4 VREF Input Impedance ................................................................................................... 31
8.5 VREF Accuracy ............................................................................................................... 32
8.6 VREF Independence ....................................................................................................... 32
9.1 Power Supply Bypassing ................................................................................................. 33
9.2 PCB Layers and Routing ................................................................................................. 33
9.3 Power Supply Rejection .................................................................................................. 33
9.4 SCR Latch-up .................................................................................................................. 34
9.5 DC-DC Converters .......................................................................................................... 34
CS5373A
3