KDC5514EVALZ Intersil, KDC5514EVALZ Datasheet - Page 19

• Manufacturer Part Number: KDC5514EVALZ
• Description: DAUGHTER CARD FOR KAD5514
• Manufacturer: Intersil
• Series: FemtoCharge™r

Specifications of KDC5514EVALZ

• Number Of Adc's: 1
• Number Of Bits: 14
• Sampling Rate (per Second): 250M
• Data Interface: Parallel
• Inputs Per Adc: 1 Differential
• Input Range: 1.47 Vpp
• Power (typ) @ Conditions: 429mW @ 250MSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: KAD5514P-25, KMB001 Motherboard
• For Use With: KMB001LEVAL - MOTHERBOARD FOR LVDS ADC CARD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: KDC5514EVAL; KDC5514EVAL

Analog Input
A single fully differential input (VINP/VINN) connects to the
sample and hold amplifier (SHA) of each unit ADC. The ideal
full-scale input voltage is 1.45V, centered at the VCM voltage
of 0.535V as shown in Figure 27.
Best performance is obtained when the analog inputs are
driven differentially. The common-mode output voltage,
VCM, should be used to properly bias the inputs as shown in
Figures 28 through 30. An RF transformer will give the best
noise and distortion performance for wideband and/or high
intermediate frequency (IF) inputs. Two different transformer
input schemes are shown in Figures 28 and 29.
This dual transformer scheme is used to improve
common-mode rejection, which keeps the common-mode
level of the input matched to VCM. The value of the shunt
resistor should be determined based on the desired load
impedance. The differential input resistance of the
KAD5514P is 500Ω.
The SHA design uses a switched capacitor input stage
(see Figure 43), which creates current spikes when the
sampling capacitance is reconnected to the input voltage.
FIGURE 28. TRANSFORMER INPUT FOR GENERAL
FIGURE 29. TRANSMISSION-LINE TRANSFORMER INPUT
1000pF
1000pF
1000pF
1.8
1.4
1.0
0.6
0.2
ADT1-1WT
FIGURE 27. ANALOG INPUT RANGE
ADTL1-12
PURPOSE APPLICATIONS
FOR HIGH IF APPLICATIONS
0.725V
ADTL1-12
ADT1-1WT
19
INP
0.1µF
0.1µF
INN
VCM
0.535V
KAD5514P
VCM
KAD5514P
VCM
KAD5514P
This causes a disturbance at the input which must settle
before the next sampling point. Lower source impedance will
result in faster settling and improved performance. Therefore
a 1:1 transformer and low shunt resistance are
recommended for optimal performance.
A differential amplifier, as shown in Figure 30, can be used in
applications that require dc-coupling. In this configuration
the amplifier will typically dominate the achievable SNR and
distortion performance.
Clock Input
The clock input circuit is a differential pair (see Figure 44 on
page 29). Driving these inputs with a high level (up to
1.8V
lowest jitter performance. A transformer with 4:1 impedance
ratio will provide increased drive levels.
The recommended drive circuit is shown in Figure 31. A duty
range of 40% to 60% is acceptable. The clock can be driven
single-ended, but this will reduce the edge rate and may
impact SNR performance. The clock inputs are internally
self-biased to AVDD/2 to facilitate AC coupling.
A selectable 2x frequency divider is provided in series with
the clock input. The divider can be used in the 2x mode with
a sample clock equal to twice the desired sample rate. This
allows the use of the Phase Slip feature, which enables
synchronization of multiple ADCs.
49.9O
0.22µF
200pF
P-P
Ω
FIGURE 30. DIFFERENTIAL AMPLIFIER INPUT
on each input) sine or square wave will provide the
FIGURE 31. RECOMMENDED CLOCK DRIVE
69.8O
69.8O
TC4-1W
Ω
100O
100O
Ω
Ω
Ω
348O
348O
1000pF
CM
Ω
Ω
0.1µF
25O
25O
Ω
Ω
217O
200pF
200pF
200O
Ω
September 10, 2009
Ω
KAD5514P
FN6804.2
CLKP
CLKN
VCM