KDC5514EVALZ Intersil, KDC5514EVALZ Datasheet - Page 3

DAUGHTER CARD FOR KAD5514

KDC5514EVALZ

Manufacturer Part Number
KDC5514EVALZ
Description
DAUGHTER CARD FOR KAD5514
Manufacturer
Intersil
Series
FemtoCharge™r

Specifications of KDC5514EVALZ

Number Of Adc's
1
Number Of Bits
14
Sampling Rate (per Second)
250M
Data Interface
Parallel
Inputs Per Adc
1 Differential
Input Range
1.47 Vpp
Power (typ) @ Conditions
429mW @ 250MSPS
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
KAD5514P-25, KMB001 Motherboard
For Use With
KMB001LEVAL - MOTHERBOARD FOR LVDS ADC CARD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
KDC5514EVAL
KDC5514EVAL

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KDC5514EVALZ
Manufacturer:
Intersil
Quantity:
5
Table of Contents
Pin-Compatible Family...................................................... 1
Key Specifications ............................................................ 1
Electrical Specifications ....................................................4
Digital Specifications ........................................................ 6
Timing Diagrams ............................................................... 7
Switching Specifications .................................................. 8
Pinout/Package Information............................................. 9
Typical Performance Curves ...........................................14
Theory of Operation ........................................................ 17
Pin Descriptions - 72QFN ................................................ 9
Pin Descriptions - 48QFN .............................................. 12
Functional Description ................................................... 17
Power-On Calibration .................................................... 17
User-Initiated Reset ....................................................... 18
Analog Input .................................................................. 19
Clock Input..................................................................... 19
Jitter ............................................................................... 20
Voltage Reference ......................................................... 20
Digital Outputs ............................................................... 20
Over-Range Indicator .................................................... 20
Power Dissipation .......................................................... 20
Nap/Sleep ...................................................................... 21
Data Format................................................................... 21
3
KAD5514P
Serial Peripheral Interface ............................................. 22
Equivalent Circuits ......................................................... 29
72 Pin/48 Pin Package Options ..................................... 30
ADC Evaluation Platform ............................................... 30
Layout Considerations................................................... 30
Revision History ............................................................. 32
Package Outline Drawing ................................................. 34
SPI Physical Interface ................................................... 23
SPI Configuration .......................................................... 24
Device Information ........................................................ 24
Indexed Device Configuration/Control .......................... 24
Global Device Configuration/Control............................. 25
Device Test ................................................................... 26
SPI Memory Map .......................................................... 27
Split Ground and Power Planes .................................... 30
Clock Input Considerations ........................................... 30
Exposed Paddle ............................................................ 30
Bypass and Filtering...................................................... 30
LVDS Outputs ............................................................... 30
LVCMOS Outputs ......................................................... 30
Unused Inputs ............................................................... 30
Definitions.................................................................... 31
September 10, 2009
FN6804.2

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