ADC08D1020DEV/NOPB National Semiconductor, ADC08D1020DEV/NOPB Datasheet - Page 11

• Manufacturer Part Number: ADC08D1020DEV/NOPB
• Description: BOARD DEV FOR ADC08D1020
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of ADC08D1020DEV/NOPB

• Number Of Adc's: 2
• Number Of Bits: 8
• Sampling Rate (per Second): 1G
• Data Interface: Serial
• Inputs Per Adc: 1 Differential
• Input Range: 870 mVpp
• Power (typ) @ Conditions: 1.6W @ 1GSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: ADC08D1020
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC08D1020DEV

C
R
ANALOG OUTPUT CHARACTERISTICS
V
TC V
V
C
V
TC V
C
CHANNEL-TO-CHANNEL CHARACTERISTICS
X-TALK
X-TALK
LVDS CLK Input Characteristics (Typical specs also apply to DCLK_RST)
V
V
C
DIGITAL CONTROL PIN CHARACTERISTICS
V
V
C
CMO
CMO_LVL
BG
ID
OSI
IH
IL
IN
IN
LOAD
LOAD
IN
IN
Symbol
CMO
BG
V
V
CMO
BG
Analog Input Capacitance,
Normal operation
(Note
Analog Input Capacitance,
DES Mode
Differential Input Resistance
Common Mode Output
Voltage
Common Mode Output
Voltage Temperature
Coefficient
V
Coupling mode
Maximum V
Capacitance
Bandgap Reference Output
Voltage
Bandgap Reference Voltage
Temperature Coefficient
Maximum Bandgap Reference
load Capacitance
Offset Match
Positive Full-Scale Match
Negative Full-Scale Match
Phase Matching (I, Q)
Crosstalk from I (Aggressor) to
Q (Victim) Channel
Crosstalk from Q (Aggressor)
to I (Victim) Channel
Differential Clock Input Level
Input Offset Voltage
Input Capacitance
(Note
Logic High Input Voltage
Logic Low Input Voltage
Input Capacitance
(Note
CMO
input threshold to set DC
10,
10,
11,
Parameter
Note
Note
Note
(Note
CMO
11)
11)
13)
load
10,
Note
11)
Differential
Each input pin to ground
Differential
Each input pin to ground
I
T
V
V
I
T
I
Zero offset selected in Control Register
Zero offset selected in Control Register
f
Aggressor = 867 MHz F.S.
Victim = 100 MHz F.S.
Aggressor = 867 MHz F.S.
Victim = 100 MHz F.S.
Sine Wave Clock
Square Wave Clock
Differential
Each input to ground
OutV, DCLK_RST, PD, PDQ, CAL
OutEdge, FSR, CalDly
OutV, DCLK_RST, PD, PDQ, CAL
OutEdge, FSR, CalDly
Each input to ground
CMO
BG
BG
IN
A
A
A
A
= 1.0 GHz
= −40°C to +85°C
= −40°C to +85°C,
= 1.8V
= 2.0V
= ±100 µA
= ±100 µA
= ±100 µA
Conditions
11
(Note
Typical
0.02
0.08
1.26
0.60
0.66
1.26
0.02
100
118
−65
−65
1.6
2.2
< 1
0.6
0.6
1.2
1.5
1.2
28
1
1
1
8)
0.69 x V
0.79 x V
0.28 x V
0.21 x V
(Note
Limits
0.95
1.45
1.20
1.33
0.4
2.0
0.4
2.0
80
80
8)
A
A
A
A
www.national.com
V
V
V
V
(Limits)
Ω (max)
V (max)
V (max)
V (max)
P-P
P-P
Ω (min)
V (min)
ppm/°C
V (min)
ppm/°C
Degree
V (min)
P-P
P-P
Units
LSB
LSB
LSB
pF
pF
pF
pF
pF
pF
dB
dB
pF
pF
pF
V
V
V
(max)
(max)
(min)
(min)