M52221DEMO Freescale Semiconductor, M52221DEMO Datasheet

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... Test access/debug port (JTAG, BDM) This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. © Freescale Semiconductor, Inc., 2007. All rights reserved. Document Number: MCF52223DS LQFP– MAPBGA– ...

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... Table 30.I C Output Timing Specifications between I2C_SCL and I2C_SDA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 31.ADC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 32.Timer Module AC Timing Specifications . . . . . . . . . . . 39 Table 33.QSPI Modules AC Timing Specifications Table 34.JTAG and Boundary Scan Timing . . . . . . . . . . . . . . . . 40 Table 35.Debug AC Timing Specification . . . . . . . . . . . . . . . . . . 42 Table 36.Revision History MCF52223 ColdFire Microcontroller, Rev Freescale Semiconductor ...

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... Background Debug Mode (BDM) JTAG - IEEE 1149.1 Test Access Port Package 1 The full debug/trace interface is available only on the 100-pin packages. A reduced debug interface is bonded on smaller packages. Freescale Semiconductor Family Configurations Table 1. MCF52223 Family Configurations Module 1 MCF52223 ColdFire Microcontroller, Rev. 2 MCF52223 Family Configurations ...

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... STBY PLL OCO PIT0 CLKGEN XTAL CLKOUT CLKMOD0 CLKMOD1 Figure 1. MCF52223 Block Diagram MCF52223 ColdFire Microcontroller, Rev. 2 GPTn QSPI_DIN, QSPI_DOUT QSPI_CLK, QSPI_CSn UTXDn URXDn QSPI URTSn UCTSn DTINn/DTOUTn DTIM 3 PWMn PMM RSTI PORTS CIM (GPIO) RSTO PIT1 GPT PWM Freescale Semiconductor ...

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... Transmit and receive FIFO buffers 2 • module — Interchip bus interface for EEPROMs, LCD controllers, A/D converters, and keypads — Fully compatible with industry-standard I — Master and slave modes support multiple masters Freescale Semiconductor 2 C bus MCF52223 ColdFire Microcontroller, Rev. 2 MCF52223 Family Configurations 5 ...

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... Programmable center or left aligned outputs on individual channels — Four clock sources (A, B, SA, and SB) provide for a wide range of frequencies — Emergency shutdown • Two periodic interrupt timers (PITs) — 16-bit counter — Selectable as free running or count down • Real-Time Clock (RTC) 6 MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...

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... Status flag indication of source of last reset • Chip integration module (CIM) — System configuration during reset — Selects one of six clock modes — Configures output pad drive strength — Unique part identification number and part revision number Freescale Semiconductor MCF52223 ColdFire Microcontroller, Rev. 2 MCF52223 Family Configurations 7 ...

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... The MCF52223 supports circuit board test strategies based on the Test Technology Committee of IEEE and the Joint Test Action Group (JTAG). The test logic includes a test access port (TAP) consisting of a 16-state controller, an instruction register, and three test registers (a 1-bit bypass register, a 112-bit boundary-scan register, and a 32-bit ID register). The boundary scan register 8 MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...

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... The OTG supplement to the USB specification extends USB to peer-to-peer application, enabling devices to connect directly to each other without the need for a PC. The dual-mode controller on the MCF52223 can act as a USB OTG host and as a USB device. It also supports full-speed and low-speed modes. Freescale Semiconductor MCF52223 ColdFire Microcontroller, Rev. 2 MCF52223 Family Configurations ...

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... A timer overflow function allows software to extend the timing capability of the system beyond the 16-bit range of the counter. The input capture and output compare functions allow simultaneous input waveform measurements and output waveform generation. The input capture function can capture the time of a selected transition edge. The output compare function can 10 MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...

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... The direct memory access (DMA) controller provides an efficient way to move blocks of data with minimal processor intervention. It has four channels that allow byte, word, longword, or 16-byte burst line transfers. These transfers are triggered by software explicitly setting a DCRn[START] bit or by the occurrence of certain UART or DMA timer events. Freescale Semiconductor MCF52223 ColdFire Microcontroller, Rev. 2 MCF52223 Family Configurations ...

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... RoHS Key Features 2 3 UARTs QSPI, A/D, DMA, USBOTG, 16-/32-bit/PWM Timers 2 3 UARTs QSPI, A/D, DMA, USBOTG, 16-/32-bit/PWM Timers MCF52223 ColdFire Microcontroller, Rev. 2 Package Speed 64 LQFP 66, 80 MHz 81 MAPBGA 81 MAPBGA 66, 80 MHz 100 LQFP Freescale Semiconductor ...

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... SCL 10 SDA 11 QSPI_CS3 12 QSPI_CS2 QSPI-DIN 16 QSPI_DOUT 17 QSPI_CLK 18 QSPI_CS1 19 QSPI_CS0 20 RCON Freescale Semiconductor 100 LQFP Figure 2. 100 LQFP Pin Assignments MCF52223 ColdFire Microcontroller, Rev. 2 MCF52223 Family Configurations DDPLL 73 EXTAL 72 XTAL 71 V SSPLL 70 PST3 69 PST2 PST1 66 65 PST0 PSTCLK 64 GPT3 63 V USB 62 DD ...

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... Figure 3. 81 MAPBGA Pin Assignments MCF52223 ColdFire Microcontroller, Rev TDO TMS TRST TDI V PLL DD IRQ1 TCLK V PLL SS V GPT3 V USB USB_DM GPT2 USB_DP USB STBY AN2 AN3 AN5 AN1 V V SSA DDA AN0 Freescale Semiconductor EXTAL XTAL AN4 AN6 AN7 V SSA ...

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... V DD URTS1 TEST UCTS0 URXD0 UTXD0 URTS0 SCL SDA QSPI_DIN QSPI_DOUT QSPI_CLK QSPI_CS0 RCON Table 2 shows the pin functions by primary and alternate purpose, and illustrates which packages contain each pin. Freescale Semiconductor 64-Pin Packages MCF52223 ColdFire Microcontroller, Rev. 2 MCF52223 Family Configurations V ...

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Table 2. Pin Functions by Primary and Alternate Purpose Pin Primary Secondary Tertiary Group Function Function Function ADC AN7 — AN6 — AN5 — AN4 — AN3 — AN2 — AN1 — AN0 — 3 SYNCA — 3 SYNCB — ...

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Table 2. Pin Functions by Primary and Alternate Purpose (continued) Pin Primary Secondary Tertiary Group Function Function Function Interrupts IRQ7 — IRQ6 — USB_ID IRQ5 — USB_VBUSV IRQ4 — USB_PULLU IRQ3 — USB_SESSE IRQ2 — USB_SESSV IRQ1 SYNCA USB_ALT_CL JTAG/BDM ...

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Table 2. Pin Functions by Primary and Alternate Purpose (continued) Pin Primary Secondary Tertiary Group Function Function Function QSPI QSPI_DIN/ — URXD1 EZPD QSPI_DOUT/ — UTXD1 EZPQ QSPI_CLK/ SCL URTS1 EZPCK QSPI_CS3 SYNCA USB_DP_PD QSPI_CS2 — USB_DM_PD QSPI_CS1 — USB_PULLU ...

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Table 2. Pin Functions by Primary and Alternate Purpose (continued) Pin Primary Secondary Group Function Function Function UART 0 UCTS0 — USB_VBUSE URTS0 — USB_VBUSD URXD0 — USB_RCV UTXD0 — USB_SUSPE UART 1 UCTS1 SYNCA URTS1 SYNCB URXD1 — USB_OE ...

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These signals are multiplexed on other pins. 4 For primary and GPIO functions only. 5 Only when JTAG mode is enabled. 6 CLKMOD0 and CLKMOD1 have internal pull-down resistors; however, the use of external resistors is very strongly recommended. ...

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... N N/A Freescale Semiconductor Table 3. Reset Signals Function Primary reset input to the device. Asserting RSTI for at least 8 CPU clock cycles immediately resets the CPU and peripherals. Driven low for 1024 CPU clocks after the reset source has deasserted. Table 4. PLL and Clock Signals ...

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... In master mode, this clock is driven by the slave mode, this clock becomes the clock input. Open-drain signal that serves as the data input/output for the I interface. MCF52223 ColdFire Microcontroller, Rev. 2 I interface. When the bus is I module; when the bus 2 C I/O Freescale Semiconductor ...

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... Analog Supply ADC Sync Inputs SYNCA / SYNCB Freescale Semiconductor Table 10. UART Module Signals Transmitter serial data outputs for the UART modules. The output is held high (mark condition) when the transmitter is disabled, idle the local loopback mode. Data is shifted out, LSB first, on this pin at the falling edge of the serial clock source ...

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... BKPT puts the processor into a halted state after the current instruction completes. Halt status is reflected on processor status/debug data signals (PST[3:0] and PSTDDATA[7:0]) as the value 0xF. If CSR[BKD] is set (disabling normal BKPT functionality), asserting BKPT generates a debug interrupt exception in the processor. MCF52223 ColdFire Microcontroller, Rev. 2 I/O I/O I Freescale Semiconductor ...

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... EzPort Clock EzPort Chip Select EzPort Serial Data In EzPort Serial Data Out Freescale Semiconductor Function Development Serial Input - Internally synchronized input that provides data input for the serial communication port to the debug module, after the DSCLK has been seen as high (logic 1). ...

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... This pin supplies power to the USB Module. DD USB This pin is the negative (ground) supply pin for the USB Module. SS VDD These pins supply positive power to the core logic. VSS This pin is the negative supply (ground) to the chip. NOTE MCF52223 ColdFire Microcontroller, Rev. 2 Function Freescale Semiconductor ...

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... The power supply must maintain regulation within operating V operating maximum current conditions. If positive injection current (V injection current may flow out of V regulation. Ensure that the external V This is the greatest risk when the MCU is not consuming power (e.g., no clock). Freescale Semiconductor Table 18. Absolute Maximum Ratings Symbol V DD ...

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... MHz (Typ) 0.070 2.9 3.6 3.9 3.6 3 TBD TBD 8 MHz (Typ) 16 MHz (Typ) 64 MHz (Typ) 0.010 2.7 3.4 3.7 3.4 3 MCF52223 ColdFire Microcontroller, Rev. 2 1,2,3 80 MHz (Typ) Units mA 6 6 TBD TBD 1,2,3 80 MHz (Typ) Units mA 5.8 6.5 5.8 6 Freescale Semiconductor ...

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... Tested using Auto Power Down (APD), which powers down the ADC between conversions; ADC running at 4 MHz in Once Parallel mode with a sample rate of 3 kHz. 4 Tested with the PLL MFD set to 7 (max value). Setting the MFD to a lower value results in lower current consumption. Freescale Semiconductor Symbol I DD ...

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... W 50 JMA θ ° 2,3 31 JMA θ 4 ° θ 5 ° Ψ ° 105 C j θ 1,2 ° θ ° 1 θ 1,3 ° JMA θ 1,3 ° JMA θ ° θ ° Ψ 6 ° 105 C j parameter, the device power jt Freescale Semiconductor ...

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... Table 24. SGFM Flash Module Life Characteristics Parameter Maximum number of guaranteed program/erase cycles Data retention at average operating temperature of 85° program/erase cycle is defined as switching the bits from 1 → 0 → Reprogramming of a flash memory array block prior to erase is not required. Freescale Semiconductor ) in °C can be obtained from × Θ ...

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... V 200 V Ω 1500 100 pF Ω 0 200 pF — — sec 1 Min Max V 3.0 3 3.0 3.6 STBY 0.7 × 4 0.35 × – 0 0.06 × — HYS DD V 2.15 2.3 LVD 60 120 LVDHYS I –1.0 1 – 0.5 — — 0.5 OL Freescale Semiconductor Unit μ ...

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... Self clocked mode frequency 5, 6 Crystal start-up time EXTAL input high voltage • External reference EXTAL input low voltage • External reference 4,7 PLL lock time 4 Duty cycle of reference Freescale Semiconductor Symbol 2 Max. IL Table 27. PLL Electrical Specifications and V = 2 DDPLL ...

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... Min Max –1.5 1.5 –0.75 0.75 — 10 — .01 7.84 8.16 jitter and USB interfaces. When in Figure 6. Min Max t — 10 CHPOV t 1.5 — CHPOI t 9 — PVCH t 1.5 — CHPI Freescale Semiconductor Unit % f ref % f ref % f sys MHz with LOR . sys percentage Unit ...

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... All AC timing is shown with respect to 50 During low power STOP, the synchronizers for the RSTI input are bypassed and RSTI is asserted asynchronously to the system. Thus, RSTI must be held a minimum of 100 ns. CLKOUT 1R1 RSTI RSTO Figure 7. RSTI and Configuration Override Timing Freescale Semiconductor Figure 6. GPIO Timing (V = 2 ...

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... CYC 0 — × t — ns CYC 2 × t — ns CYC Figure 8. Min Max Units 6 × t — ns CYC 10 × t — ns CYC — — µs 7 × t — ns CYC — × t — ns CYC 2 × t — ns CYC 20 × t — ns CYC 10 × t — ns CYC 2 Table 31. The I Freescale Semiconductor C ...

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... Input injection current , per pin ADI I V current VREFH REFH V Offset voltage internal reference OFFSET E Gain error (transfer path) GAIN V Offset voltage external reference OFFSET SNR Signal-to-noise ratio Freescale Semiconductor Table 30 and Table 31 Figure Input/Output Timings Table 32. ADC Parameters Min REFL 3.0 V ...

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... Clock Rate) × (1.4×10 Figure 9. Equivalent Circuit for A/D Loading MCF52223 ColdFire Microcontroller, Rev. 2 Min Typical Max −75 — — — 70.3 — — 63.9 — 9.1 10.6 — -V REFH -V )/2. The switches REFH REFL S 1pF 1 -12 ) Freescale Semiconductor Unit Bits )/2, while REFL ...

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... QSPI_CLK high to QSPI_DOUT invalid (Output hold) QS4 QSPI_DIN to QSPI_CLK (Input setup) QS5 QSPI_DIN to QSPI_CLK (Input hold) The values in Table 34 correspond to QS1 QSPI_CS[3:0] QSPI_CLK QSPI_DOUT QS3 QSPI_DIN Freescale Semiconductor 1 Characteristic Characteristic Figure 10. QS2 Figure 10. QSPI Timing MCF52223 ColdFire Microcontroller, Rev. 2 Electrical Characteristics Min Max Unit 3 × t — ...

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... MCF52223 ColdFire Microcontroller, Rev. 2 Symbol Min Max f DC 1/4 JCYC 4 × — JCYC CYC t 26 — JCW JCRF t 4 — BSDST t 26 — BSDHT BSDV BSDZ t 4 — TAPBST t 10 — TAPBHT TDODV TDODZ t 100 — TRSTAT t 10 — TRSTST J3 Freescale Semiconductor Unit f sys ...

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... IL Data Inputs Data Outputs Data Outputs Data Outputs TCLK V IL TDI TMS TDO TDO TDO TCLK TRST Freescale Semiconductor J5 Input Data Valid Figure 12. Boundary Scan (JTAG) Timing J9 Input Data Valid J11 J12 J11 Figure 13. Test Access Port Timing 14 13 Figure 14. TRST Timing MCF52223 ColdFire Microcontroller, Rev ...

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... Table 36. Debug AC Timing Specification Characteristic Table 36. CLKOUT D1 PST[3:0] DDATA[3:0] Figure 15. Real-Time Trace AC Timing MCF52223 ColdFire Microcontroller, Rev. 2 Figure 16. 66/80 MHz Units Min Max 4 — ns 1.5 — × t — ns CYC 4 × t — ns CYC 5 × t — ns CYC 4 — ns 1.5 — ns 0.0 10 Freescale Semiconductor ...

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... Figure 16 shows BDM serial port AC timing for the values in CLKOUT DSCLK D3 DSI DSO Freescale Semiconductor Table 36. D5 Current D4 Past Figure 16. BDM Serial Port AC Timing MCF52223 ColdFire Microcontroller, Rev. 2 Electrical Characteristics Next Current 43 ...

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... Mechanical Outline Drawings 3 Mechanical Outline Drawings This section describes the physical properties of the 3.1 64-pin LQFP Package 44 MCF52223 and its derivatives. MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...

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... Freescale Semiconductor MCF52223 ColdFire Microcontroller, Rev. 2 Mechanical Outline Drawings 45 ...

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... Mechanical Outline Drawings 46 MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...

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... QFN Package Freescale Semiconductor MCF52223 ColdFire Microcontroller, Rev. 2 Mechanical Outline Drawings 47 ...

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... Mechanical Outline Drawings 48 MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...

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... Freescale Semiconductor MCF52223 ColdFire Microcontroller, Rev. 2 Mechanical Outline Drawings 49 ...

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... Mechanical Outline Drawings 50 MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...

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... MAPBGA Package Freescale Semiconductor MCF52223 ColdFire Microcontroller, Rev. 2 Mechanical Outline Drawings 51 ...

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... Mechanical Outline Drawings 52 MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...

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... LQFP Package Freescale Semiconductor MCF52223 ColdFire Microcontroller, Rev. 2 Mechanical Outline Drawings 53 ...

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... Mechanical Outline Drawings 54 MCF52223 ColdFire Microcontroller, Rev. 2 Freescale Semiconductor ...

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... Synchronized the “Pin Functions by Primary and Alternate Purpose” table in this document and the reference manual. • Added a specification for V • Added specifications for V • Deleted entries for the nonexistent 64 QFN package from the “Thermal Resistances” table. Freescale Semiconductor Table 37. Revision History Description ) to the “DC electrical specifications” table. STBY and I to the “ ...

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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...