M52221DEMO Freescale Semiconductor, M52221DEMO Datasheet - Page 22

• Manufacturer Part Number: M52221DEMO
• Description: BOARD DEMO FOR MCF52221
• Manufacturer: Freescale Semiconductor
• Series: ColdFire®r
• Type: MPUr

Specifications of M52221DEMO

• Contents: SBC, Cables and Software
• Processor To Be Evaluated: MCF52221
• Data Bus Width: 32 bit
• Interface Type: RS-232, USB
• Silicon Manufacturer: Freescale
• Core Architecture: Coldfire
• Core Sub-architecture: Coldfire V2
• Silicon Core Number: MCF52
• Silicon Family Name: MCF5222x
• Rohs Compliant: Yes
• For Use With/related Products: MCF52221
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MCF52223 Family Configurations
1.6
Table 7
1.7
Table 8
1.8
This device is compliant with industry standard USB 2.0 specification.
1.9
Table 9
22
Synchronous Peripheral
QSPI Synchronous
QSPI Synchronous
QSPI Serial Clock
External Interrupts
describes the external interrupt signals.
describes the QSPI signals.
Serial Data Input
describes the I
Signal Name
Serial Output
Signal Name
Chip Selects
Signal Name
Serial Clock
Serial Data
External Interrupt Signals
Queued Serial Peripheral Interface (QSPI)
USB On-the-Go
I
2
C I/O Signals
2
C serial interface module signals.
Table 8. Queued Serial Peripheral Interface (QSPI) Signals
QSPI_CS[3:0] QSPI peripheral chip select; can be programmed to be active high or
Abbreviation
Abbreviation
Abbreviation
QSPI_DOUT Provides the serial data from the QSPI and can be programmed to be
QSPI_CLK
QSPI_DIN
IRQ[7:1]
SDA
SCL
MCF52223 ColdFire Microcontroller, Rev. 2
Table 7. External Interrupt Signals
External interrupt sources.
Open-drain clock signal for the for the I
In master mode, this clock is driven by the I
is in slave mode, this clock becomes the clock input.
Open-drain signal that serves as the data input/output for the I
interface.
driven on the rising or falling edge of QSPI_CLK.
Provides the serial data to the QSPI and can be programmed to be
sampled on the rising or falling edge of QSPI_CLK.
Provides the serial clock from the QSPI. The polarity and phase of
QSPI_CLK are programmable.
low.
Table 9. I
2
C I/O Signals
Function
Function
Function
2
C interface. When the bus is
2
C module; when the bus
Freescale Semiconductor
2
C
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I