Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 114

• Manufacturer Part Number: Z8F16800144ZCOG
• Description: KIT DEV FOR Z8F642 MCU 44 PIN
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F16800144ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F642
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4678

PS025011-1010
generated the interrupt, read the associated GPIO input value and compare to the value
stored in the TPOL bit.
The timer counts up to the 16-bit Reload value stored in the Timer Reload High and Low
Byte registers. The timer input is the timer clock. When reaching the Reload value, the
timer generates an interrupt, the count value in the Timer High and Low Byte registers is
reset to
Also, if the Timer Output alternate function is enabled, the Timer Output pin changes state
(from Low to High or from High to Low) at timer reset.
Follow the steps below for configuring a timer for GATED mode and initiating the count:
1. Write to the Timer Control 1 register to:
2. Write to the Timer Control 2 register to choose the timer clock source.
3. Write to the Timer Control 0 register to set the timer interrupt configuration field
4. Write to the Timer High and Low Byte registers to set the starting count value. This
5. Write to the Timer Reload High and Low Byte registers to set the Reload value.
6. If required, enable the timer interrupt and set the timer interrupt priority by writing to
7. Configure the associated GPIO port pin for the Timer Input alternate function.
8. Write to the Timer Control 1 register to enable the timer.
9. Assert the Timer Input signal to initiate the counting.
CAPTURE/COMPARE Mode
In CAPTURE/COMPARE mode, the timer begins counting on the first external Timer
Input transition. The desired transition (rising edge or falling edge) is set by the TPOL bit
in the Timer Control 1 register. The Timer counts timer clocks up to the 16-bit Reload
value.
Every subsequent desired transition (after the first) of the Timer Input signal captures the
current count value. The Capture value is written to the Timer PWM0 High and Low Byte
Registers. When the Capture event occurs, an interrupt is generated, the count value in the
–
–
–
TICONFIG.
only affects the first pass in GATED mode. After the first timer reset in GATED mode,
counting always begins at the reset value of
the relevant interrupt registers. By default, the timer interrupt will be generated for
both input deassertion and reload events. If required, configure the timer interrupt to
be generated only at the Input Deassertion event or the Reload event by setting
TICONFIG field of the Timer Control 0 register.
0001H
Disable the timer
Configure the timer for GATED mode
Set the prescale value
and counting resumes (assuming the Timer Input signal is still asserted).
P R E L I M I N A R Y
0001H
.
Z8 Encore! XP
Product Specification
®
F1680 Series
Timers
100