IPT-C2H-NIOS Altera, IPT-C2H-NIOS Datasheet - Page 63

• Manufacturer Part Number: IPT-C2H-NIOS
• Description: C2H COMPILER FOR NIOS II
• Manufacturer: Altera
• Series: Nios®IIr
• Type: Nios IIr

Specifications of IPT-C2H-NIOS

• Function: C to Hardware Compiler
• License: Initial License
• Software Application: IP CORE, NIOS Processor And Functions
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Figure 3–11. Complex Write Operation
Altera Corporation
November 2009
The write-data signal for the Avalon-MM master port is computed and
registered in parallel with the address assignment. As soon as
ptr_to_int_i_addr and ptr_to_int_i_writedata are valid,
write-enable control logic asserts the signal ptr_to_int_i_write,
which initiates a transfer on the master port.
Figure 3–11
dereferenced pointer. Translation of the data-computation logic follows
the rules described in section
Master-Slave Connections
The C2H Compiler uses pragmas that allow user control of master-slave
connections and arbitration shares. This section describes the pragmas to
control master-slave connections.
The C language specification dictates that when a compiler
implementation encounters a pragma directive it does not recognize, the
compiler ignores the pragma. By using pragmas, you can write directives
to optimize the C2H Compiler results, without making the C code
incompatible with other compilers.
*(ptr_to_int + i) = a*x + y;
shows the logic created for the following write operation to a
9.1
“Assignments” on page
C-to-Hardware Mapping Reference
Nios II C2H Compiler User Guide
3–2.
3–23